QSPI Peripheral Configuration

R2026b

Map QSPI peripherals in the Infineon AURIX model to peripheral registers in the MCU

Since R2024a

Description

Add-On Required: This feature requires the Embedded Coder Support Package for Infineon AURIX TC3x Microcontrollers add-on.

View and edit the map of peripheral blocks in the Infineon^® AURIX™ model to the hardware peripherals.

Using the Hardware Mapping tool, you can:

• View and edit configuration parameters for QSPI peripheral block.

• Configure the global parameters. To set the group peripheral, select peripheral in Browser > Peripherals > QSPIPeripheral . For more, see Map Tasks and Peripherals Using Hardware Mapping.

• Check for any conflicts between the peripherals.

Open the QSPI Peripheral Configuration

To open the Hardware Mapping tool, on the Simulink toolstrip, in the Hardware tab, click Hardware Mapping.

Parameters

Module selection

Module selection — QSPI peripheral module selection

0 (default) | 1 | 2 | 3 | 4

Select the peripheral module for QSPI communication.

SPI protocol configuration

Clock Polarity — Clock polarity in idle state

Idle low (default) | Idle High

Specify the polarity of the clock signal received from the QSPI controller block.

Clock phase — Serial clock edge for QSPI communication

Leading edge (default) | Trailing edge

Specify the clock edge of the clock signal received from the QSPI controller block.

Endianness — Byte ordering format used by the QSPI Peripheral block while transmitting or receiving multi‑byte data element

LSB first (default) | MSB first

Select the QSPI data heading in binary numbers.

• LSB first — SDO pin outputs the least significant bit (LSB) first, then transmits the remaining bits from right to left.

• MSB first — SDO pin transmits the most significant bit (MSB) first, then transmits the remaining bits from left to right.

Parity — Clock parity bit type

Even (default) | Odd

Specify the clock parity of the clock signal received from the QSPI controller block.

Pin selection

SLSI(Peripheral select input pin) — Chip select input pin

options vary based on module selection

Specify the pin number to receive the chip select signal from the QSPI controller block.

Serial clock — Serial clock input pin

Read-only: options vary based on module selection

This parameter is read-only.

Specify the pin number to receive the serial clock signal from the QSPI controller block.

Serial data out — Pin number to receive serial data

Read-only: options vary based on module selection

This parameter is read-only.

Specify the pin number to receive serial data from the QSPI Controller block.

Serial data in — Pin number to transmit serial data

Read-only: options vary based on module selection

This parameter is read-only.

Specify the pin number to transmit serial data to the QSPI Controller block.

Pin configuration

Input pins configuration — Configuration mode of the QSPI input pins

Pull-down (default) | Tri-state | Pull-up

Specify input pin pull for the QSPI communication.

Output drive strenght — Configuration mode of the QSPI output pins

Push pull (default) | Open-drain

Specify drive strength for the QSPI output pin.

Voltage level — Voltage level for QSPI pin

Automotive (default) | TTL-5V | TTL-3.3V

Specify voltage level for QSPI pin.

Speed — Speed for QSPI pin

Speed-1 (default) | Speed-2 | Speed-3 | Speed-4

Select the pin speed for QSPI pins.

Events

TxFifo event — Option to enable QSPI transmit buffer interrupt

off (default) | on

Select to enable the QSPI transmit FIFO interrupt.

TxFifo mode — FIFO flag mode setting for transmit FIFO buffer

Read-only: Batch Move (default) | Single Move

This parameter is read-only.

Select one of these operation modes for transmit FIFO buffer:

• Single Move — Select this mode to generate an interrupt to refill the transmit buffer as soon as there is a free element.

• Batch Move — Select this mode to generate an interrupt if the FIFO level of transmit data exceeds above TxFifo mode threshold value.

Dependencies

To enable this parameter, select the TxFifo event parameter.

TxFifo mode threshold — FIFO level for transmit FIFO event

1 (default) | 2 | 3 | 4

Specify FIFO level for the Tx FIFO event.

Dependencies

To enable this parameter, select the TxFifo event parameter.

RxFifo event — Option to enable QSPI receive buffer interrupt

off (default) | on

Enables the QSPI receive buffer interrupt.

RxFifo mode — FIFO flag mode setting for receive buffer

Read-only: Batch Move (default) | Single Move

This parameter is read-only.

Select one of these operation modes for the receive buffer:

• Single Move — Select this mode to generate an interrupt to fetch the received element as soon as possible.

• Batch Move — Select this mode to generate an interrupt if the filling level rises above RxFifo mode threshold value.

Dependencies

To enable this parameter, select the RxFifo event parameter.

RxFifo mode threshold — FIFO level for Rx FIFO event

1 (default) | 0 | 2 | 3

Specify FIFO level for Rx FIFO event.

Dependencies

To enable this parameter, select the RxFifo event parameter.

Enable error event — Option to enable error interrupt

off (default) | on

Select to enables the QSPI error interrupt.

Version History

Introduced in R2024a