Modeling

Prepare model for hardware connection, add blocks to support hardware protocols

Blocks and simulation features for the AMD^® SoC Device.

Blocks

AXI4-Interface Read	Read data from IP core on AMD SoC Device
AXI4-Interface Write	Write data to IP core on AMD SoC Device
Linux Task	Spawn task function as separate Linux thread
UDP Receive	Receive UDP packet
UDP Send	Send UDP message
VxWorks Task	Spawn task function as separate VxWorks thread
AXI4-Stream IIO Write	Write AXI4-Stream Data using IIO
AXI4-Stream IIO Read	Read AXI4-Stream Data using IIO

Model Settings

Hardware Implementation Pane: AMD Zynq ZC702/ZC706 Evaluation Kits

Hardware Implementation Pane: ZedBoard

Functions

zynqlib Open the Simulink Library Browser to the Embedded Coder Support Package for AMD SoC Devices block library

Featured Examples

Communicate with AMD Zynq Boards Using UDP Protocol

Send data from a Simulink® model running on an ARM® Cortex®-A processor in an AMD Zynq® platform to another model running on the host computer by using the UDP ethernet protocol.

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Basic Control Algorithm Partitioned into FPGA and ARM

Models a field-oriented controller (FOC) for a permanent magnet synchronous machine (PMSM) on the AMD Zynq® UltraScale+™ MPSoC target. This example uses the Trenz Electronic™ Motor Control Development Kit TE0820 revision 4. If you do not have the required hardware, you can use this example to help you develop a controller for your own hardware configuration.

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