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Create bitstream containing user programming and download it to the FPGA hardware

To program the FPGA and run your algorithm on the hardware, HDL Coder™ can generate an IP core, and deploy it to the Xilinx® FPGA boards. You can also program the FPGA board by using the FPGA Turnkey workflow, which generates HDL code for your algorithm and the FPGA top level wrapper and then deploys your design to the board.


IP Core Generation

FPGA Turnkey