This configuration parameter resides in the Clock Settings section of the HDL Code Generation > Global Settings pane in the Configuration Parameters dialog box. Use this parameter to specify the frequency of the global oversampling clock as a multiple of the model base rate.
Oversampling factor specifies the factor by which the global clock signal is a multiple of the base rate at which the model operates. Use the Oversampling factor to integrate the DUT with a larger system that supplies timing signals to other components in the system at the global oversampling clock.
By default, HDL Coder™ does not generate a global oversampling clock. To generate a global oversampling clock, specify an integer greater than one. If you use a multirate DUT, make sure that other rates in the DUT divide evenly into the global oversampling rate.
Generation of the global oversampling clock affects the generated HDL code. It does not affect the simulation behavior of your model.
if you use multiple clocks, the Oversampling factor
must be set to one. If you want to use an Oversampling
factor greater than one, set ClockInputs
If you specify an Oversampling factor greater than one, make sure that the clock-rate pipelining optimization is enabled. You can specify this setting in the HDL Code Generation > Target and Optimizations > Pipelining tab.
Clock-rate pipelining uses the Oversampling factor to convert the slow regions in your model that operate at the base sample rate to the faster clock rate.
|Value: integer greater than or equal to 1|
For example, you can specify this property when you generate HDL code for the
symmetric_fir subsystem inside the
sfir_fixed model by using either of these methods:
Pass the property as an argument to the
makehdl('sfir_fixed/symmetric_fir', ... 'Oversampling',5)
When you use
hdlset_param, you can set the
parameter on the model, and then generate HDL code by using