SVPWM Generator (3-Level)

Generate pulses for SVPWM-controlled three-level converter

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  • Simscape / Electrical / Specialized Power Systems / Fundamental Blocks / Power Electronics / Pulse & Signal Generators

    Simscape / Electrical / Specialized Power Systems / Control & Measurements / Pulse & Signal Generators

Description

The SVPWM Generator (3-Level) generates pulses for three-phase three-level Neutral-Point-Clamped (NPC) converters. The block generates twelve pulses using the space vector pulse width modulation (SVPWM) technique.

The neutral-point voltage deviation is controlled by a proportional regulator using two DC voltages, as well as the DC current flowing in or out of the DC link. The defining equation is

Vout=mVdc2,

where:

  • Vout is the line-to-line rms voltage generated by the NPC.

  • m is the modulation index and 0 < m < 1.

  • Vdc is the DC current flowing in or out of the DC link.

Ports

Input

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Reference voltage in terms of sinusoidal voltages. Specify three voltages, one per phase, that you want the attached converter to output.

Dependencies

Setting the Voltage reference (Vref) parameter to Three-phase signals exposes this parameter.

Data Types: single | double

Reference voltage in terms of magnitude and angle, in rad. Specify the magnitude and angle of the voltage that you want the attached converter to output.

Dependencies

Setting the Voltage reference (Vref) parameter to Magnitude-Angle (rad) exposes this parameter.

Data Types: single | double

Reference voltage in terms of alpha and beta components. Specify the alpha and beta components of the voltage that you want the attached converter to output.

Dependencies

Setting the Voltage reference (Vref) parameter to alpha-beta components exposes this parameter.

Data Types: single | double

When the block generates the reference voltage internally, no reference signal is input.

Dependencies

Setting the Voltage reference (Vref) parameter to Internally generated exposes this parameter.

Voltage between the + and N terminals of the three-level NPC converter block that is controlled by the SVPWM Generator (3-Level) block.

Data Types: single | double

Voltage between the N and - terminals of the three-level NPC converter block that is controlled by the SVPWM Generator (3-Level) block.

Data Types: single | double

Current of the DC link flowing out the three-level NPC converter block that is controlled by the SVPWM Generator (3-Level) block

Data Types: single | double

Output

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12-pulse waveforms that determine switching behavior in the attached power converter.

Data Types: single | double

Neutral-point deviation voltage of the generator control system.

Data Types: single | double

Parameters

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Reference-voltage parameterization method.

Dependencies

Setting this parameter to:

  • Three-phase signals exposes the Vabc_ref port, hides the Reference vector [ Mag (0<m<1), Phase (degrees), Freq (Hz) ] parameter, and hides the |Vref|∠Vref, Vα Vβ ref, and X (internal) ports.

  • Magnitude-Angle (rad) exposes the |Vref|∠Vref port, hides the Reference vector [ Mag (0<m<1), Phase (degrees), Freq (Hz) ] parameter, and hides the Vabc_ref, Vα Vβ ref, and X (internal) ports.

  • alpha-beta components exposes the Vα Vβ ref port, hides the Reference vector [ Mag (0<m<1), Phase (degrees), Freq (Hz) ] parameter, and hides the Vabc_ref, |Vref|∠Vref, and X (internal) ports.

  • Internally generated exposes the Reference vector [ Mag (0<m<1), Phase (degrees), Freq (Hz) ] parameter and the X (internal) port and hides the Vabc_ref, |Vref|∠Vref, and Vα Vβ ref ports.

Constant for proportional gain.

Idc filter cut-off frequency, in Hz.

PWM switching frequency, in Hz.

Three-element reference vector of magnitude, in m, phase, in degrees, and frequency, in Hz.

Dependencies

Setting the Voltage reference (Vref) parameter to Internally generated exposes this parameter.

Time between consecutive block executions. During execution, the block produces outputs and, if appropriate, updates its internal state.

Extended Capabilities

C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.

Introduced in R2018b