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Implement on Device

Generate code and deploy SoC applications on SoC device

SoC Blockset™ exports reference designs for ASICs, FPGAs, and systems on a chip (SoC) by using Xilinx® and Intel® design tools. Automatically generate hardware and software code, and execute on an SoC device by using the SoC Builder tool. Code generation requires HDL Coder™, Embedded Coder®, or both.

Tools

SoC BuilderBuild, load, and execute SoC model on SoC, FPGA, and MCU boards
Memory MapperConfigure memory map for SoC application
Task MappingMap tasks in the SoC to interrupt service routines on the hardware board
Peripheral ConfigurationMap peripherals in the SoC model to peripheral registers in the MCU

Functions

socExportReferenceDesignExport custom reference design for HDL Workflow Advisor

Simulink Configuration Parameters

Topics

SoC Generation Workflows

Choose between the SoC Builder tool and the exportReferenceDesign function for deploying your design on an SoC device.

Generate SoC Design

Generate an SoC design and run it on an SoC device using the SoC Builder tool.

Export Custom Reference Design from SoC Model

Use the socExportReferenceDesign function to export a custom reference design from an SoC Blockset model.

Code Generation of Software Tasks

Mapping between tasks in an SoC application model and threads in generated code.

Supported Third-Party Tools and Hardware

Version support for third-party tools.

Troubleshooting

Build Error When FPGA or Processor Model Not Detected

Unsupported mode in when generating SoC design using SoC Builder.

Featured Examples