MATLAB AXI Master
Access on-board memory locations from MATLAB or Simulink by using the MATLAB AXI master IP in your FPGA design. This IP connects to slave memory locations on the board. The IP also responds to read and write commands from MATLAB or Simulink, over JTAG, PCI Express, or Ethernet cable.
|Read and write memory locations on FPGA board from MATLAB|
High-level steps for accessing memory-mapped locations on an FPGA board from MATLAB or Simulink.
Integrate and configure Ethernet MATLAB AXI master.
Integrate and configure MATLAB as AXI Master IP over PCI Express.
Access memory-mapped locations on an FPGA board from Simulink.