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loadBitstream

Load custom FPGA bitstream and its corresponding DTB file to target SoC device

Description

loadBitstream(BoardName,FPGAImage,DeviceTree) loads the custom FPGA bitstream and its corresponding device tree blob (DTB) file of the specified board to the targeted SoC device by using Ethernet.

loadBitstream(BoardName,FPGAImage,DeviceTree,Name,Value) specifies options using one or more name-value pair arguments. For example, 'Gateway','192.168.0.4' sets the gateway for the network interface.

Input Arguments

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Targeted SoC board name, specified as one of these values.

  • 'ZedBoard' – Xilinx® Zynq® ZedBoard™

  • 'ZC706' – Xilinx Zynq-7000 ZC706

Data Types: char | string

Custom FPGA bitstream file to be loaded onto the target board, specified as a character vector or string scalar.

Example: 'C:\mywork\hdlv_bitstreams\system.bit'

Data Types: char | string

Custom DTB file to be loaded onto the target board, specified as a character vector or string scalar.

Example: 'C:\mywork\hdlv_bitstreams\devicetree.dtb'

Data Types: char | string

Name-Value Arguments

Specify optional pairs of arguments as Name1=Value1,...,NameN=ValueN, where Name is the argument name and Value is the corresponding value. Name-value arguments must appear after other arguments, but the order of the pairs does not matter.

Before R2021a, use commas to separate each name and value, and enclose Name in quotes.

Example: loadBitstream('ZC706','C:\mywork\hdlv_bitstreams\system.bit','C:\mywork\hdlv_bitstreams\devicetree.dtb');

Specify the Internet Protocol (IP) Address of the target SoC device.

Use this argument to configure a non-default address while using the copyImageToHostSDCardPath command.

Example: 'DeviceAddress','192.168.0.8'

Data Types: char | string

Version History

Introduced in R2020a