Video Capture MIPI
Libraries:
Vision HDL Toolbox Support Package for Xilinx Zynq-Based Hardware
Description
The Video Capture MIPI block imports video frames from an IMX274 FMC MIPI® card connected to a Zynq®-based board into your Simulink® model. The support package programs the FPGA with an image that demosaics and gamma-corrects the video input from the sensor, and allows capture of the video from Simulink. You can control the frame size and Simulink video signal format options from the Video Capture MIPI block.
The FPGA image also contains an IP core called the FPGA user logic that you can generate from your design by using HDL Workflow Advisor. The block captures the input video after the FPGA user logic.
The video data is in AXI4-Stream Video format on the FPGA. When you capture the video to Simulink, the stream is converted to frame-based video.
The reference design requires the same video resolution and color format for the entire data path. The design you target to the FPGA user logic must not modify the frame size or format of the data.
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Output
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Version History
Introduced in R2022b