Assigning PWM Ports in Speedgoat Motion Control HDL I/O Blockset for IO334 with 3xx-21 Extension Card?

I want to use pwm_example_hdlc.slx example from Speedgoat Motion Control HDL I/O Blockset v1.0 (R2024b). The Example is originally set to use with IO324. I am using Speedgoat P3 with IO334 and 3xx-21 Extension card.

In HDL Workflow Advisor, step 1.3 Set Target Interface, I need to assign interfaces for ports. It seems that I do not have any suitable option available for TTL_PMW_x and TTL_CAP_x ports (it defaults to "No Interface Specified"). In this webinar (19:37) it can be seen that interface option IO3XX-21 [0:55] should be available.

How can solve this problem?

[Klemen D]

I think I found the reason. Eventhough I select the Target Platform at the beginning, HDL Coder in step 1.2 Set target device and Synthesis tool, in I/O Interface Extension, defaults to None. After assigning to -21, and executing Run this Task command, the TTL IO3xx-21 [0:55] option becomes available.

[Klemen D]

The only thing that is not clear to is that after executing Run This Task in step 1.2, the following Warning is issued:

Warning Could not apply IOInterface setting "IO324 TTL Input [0:31]" to port "pwm_example_hdlc/DUT PWM and CAP/TTL_CAP_A" for the following reason: Invalid target interface 'IO324 TTL Input [0:31]' for port 'TTL_CAP_A', valid choices are: No Interface Specified; FPGA Data Capture (Not installed); PCIe Interface; DMA Stream FPGA to CPU Master; DMA Stream CPU to FPGA Slave; IO334 AI Data [0:15]; IO334 AI Valid [0:7]; LVCMOS FireFly Channel [0:7]; LVDS FireFly Channel [0:3]; External Port; TTL IO3xx-21 [0:55]; TTL IO3xx-21 Bidirectional Input [0:5]; AXI4 Master external RAM Read; AXI4 Master external RAM Write; Default or last valid setting is applied instead.

Where does HDL coder get instruction to default assign interfaces relating to IO324 TTL? I think some artifacts of the global setting for IO324 remain somewhere.

Step 2.1 then fails " Incorrect model configuration settings for HDL code generation." and propose changing of speedgoat.tlc to grt.tlc which probably is not expected behaviour.

Answer 1

[Dimitri MANKOV]

Hi Klemen,

You can fix this issue by selecting the correct platform and I/O interface extension in steps 1.1 and 1.2 of the HDL Workflow Advisor. In particular, the IO334 module by itself does not have any digital I/O channels, and requires an IO3xx-21 or IO3xx-22 extension module to map additional TTL channels.

As to the warning messages, they will always be displayed in the HDL Workflow Advisor if you change the platform in steps 1.1 and/or 1.2 and make previously mapped interfaces unavailable. These warning disappear as soon as the input/output ports of your model are re-mapped to new interfaces.

Finally, the error message "Incorrect model configuration settings for HDL code generation" is expected in your case, and is explained in the following MATLAB Answers post.

I hope this is helpful!

Dimitri