Why does the execution of an ADC Block takes much longer in SOC0 than in other SOCs?

I am generating code for a TI C2000 board. I have ADC Blocks in my Simulink model. For all ADC units in SOC0 takes a longer time according to the Code Execution Profiling Report. Why is this and how can I avoid it? The TI DSP used is TMS320F28379D.

Answer 1

[MathWorks Support Team]

The profiling report shows the longer time only for the initialization part of the simulation. This delay is due to the fact when the ADC module is enabled, it requires an 500usec delay before it can start conversion. This delay is to ensure the process gets initialized correctly. The generated code provides a delay of 1ms when initializing each ADC module.

For example: For SOC0 of ADC module A - a delay is implemented. Then for other SOC we don't need this delay as an overall time of 1ms is enough to get the given ADC module working.

That is why we are seeing this delay for SOC0 for each ADC module because SOC0 is initialized first.

Once the initialization part is over, all ADC Blocks will have much faster execution regardless of SOC (dependent on you target hardware).