Risposto
Multiplier using HDL library
Place a Product block in your design subsystem; feed it two ufix4 inputs. Alternatively: use a MATLAB Function block that con...

oltre 10 anni fa | 1

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Integrating HDL Coder, System Generator and VHDL/Verilog projects
If you really need to combine disparate sets of code into one project, the most obvious approach is to design your overall hiera...

oltre 10 anni fa | 0

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Risposto
simple IIR filter design
You might want to take a look at either <http://www.mathworks.com/products/hdl-coder/ HDL Coder> or <http://www.mathworks.com/pr...

oltre 10 anni fa | 1

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how can I konw the subset that hdl coder supported to transform a matlab to the verilog
The MATLAB functions supported by HDL Coder are conveniently listed in the documentation. From the MATLAB prompt, type: >> ...

quasi 11 anni fa | 0

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HDL Coder "Requested CP number exceeds total number of register-to-register CPs"
|CP| stands for Critical Path. You have requested critical path analysis on your model, which will analyze the post-synthesis re...

quasi 11 anni fa | 1

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I want to run Vhdl Library on matlab
The short answer is that the function calls you list are not supported by HDL Coder, just like the message you received says. Th...

quasi 11 anni fa | 0

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real data type from hdl coder
HDL Coder's bit true and cycle accurate output mirrors precisely what you have placed into your Simulink or MATLAB design. If y...

quasi 11 anni fa | 0

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IFFT HDL optimizer block to HDL coder conversion
Are the input and output signals attached to the IFFT block all running at the same rate? You can check the model's rates with t...

quasi 11 anni fa | 0

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"Attempt to Reference Field of Non-Structure Array" when opening HDL Workflow Advisor
Dave, I believe that this may be a bug. Can you please report it through standard MathWorks channels?

quasi 11 anni fa | 0

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Risposto
i have a MATLAB EMBEDDED function code which i use in simulink. Can i convert it into verilog code and then run if in Vertex 4??
In general the answer to your question is 'yes', although the full answer truly depends upon the contents of your MATLAB Functio...

quasi 11 anni fa | 0

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write a function to the code i have and i need to have a function file and a main and want to convert it to a verilog HDL ??
HDL Coder can take MATLAB code and convert it into Verilog. However, you need to consider your code from the perspective of what...

quasi 11 anni fa | 0

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How can I write bit hex data in Test bench file while generating vhdl file using HDL CODER?
The data as you are showing in your question is a 2x16 array of char; this is not the numeric data that you probably want. Wh...

quasi 11 anni fa | 0

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HDL Coder Delay (or Pause) in Code
If you need a real-world delay, your best bet is to build a counter that counts <N> cycles and a comparison to a specific value....

quasi 11 anni fa | 0

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How to Configure "use ieee.std_logic_unsigned.all; " in HDL Coder
The use of std_logic_unsigned, while convenient, is not supported by HDL Coder. Many people in the industry feel the use of the ...

quasi 11 anni fa | 0

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Risposto
I want to convert matlab code to hdl code to dump it in FPGA. to convert this there are two files required i.e matlab file (with m extension) and test bench file (with tb.m extension) . I have only MATlab code what to do for testbench?
The simple answer is that you need to write a testbench. How do you know that your MATLAB code is correct in implementing you...

quasi 11 anni fa | 0

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how to write hdl testbench inside matlab using system clock delays for simulink hdl model verification?
I think what you are asking is, can you use a Simulink model to provide the stimulus to HDL code while the HDL simulates inside ...

quasi 11 anni fa | 0

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Risposto
Support for MATLAB functions "medfilt2" and "adapthisteq" on Simulink
In general the supported functions inside a MATLAB Function block are the same ones as for generating HDL from MATLAB, as docume...

quasi 11 anni fa | 2

Risposto
how to back annotate for hdl code
The HDL Coder Workflow Advisor can backannotate either the pre- or post- Place and Route timing information from supported synth...

circa 11 anni fa | 0

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Tri-state buffer in simulink
Support for enumerated types was added to HDL Coder in R2014a. You could try making an enumerated type in Simulink that containe...

circa 11 anni fa | 0

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HDL coder error: Conversion to HDL
The |For Iterator Subsystem| is not supported for HDL code generation. Run the following command in MATLAB to access the documen...

circa 11 anni fa | 0

circa 11 anni fa | 0

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i want to get the size of image that can be capable for code generation
Behavioral functions like |imread| are not supported for HDL code generation. How can a FPGA read a file from disk? You will h...

circa 11 anni fa | 0

Risposto
How to use fft in matlab hdl code to generate hdl code
There are FFT and IFFT examples in the shipping documentation. For example, take a look at "HDL Implementation of LTE OFDM Modul...

circa 11 anni fa | 0

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How to find local maxima and its location in real time using simulink ( HDL convertable)
You'll need to analyze the time sequence yourself, computing the discrete derivative and looking for it to either become zero or...

circa 11 anni fa | 0

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How to add vriloq/VHDL code into simulink ?
You are looking for the HDL Verifier product. HDL Verifier will let you co-simulate between Simulink and either Mentor Graphics...

circa 11 anni fa | 0

Risposto
Why do I receive "Unable to match the starting point because it has been elaborated in Altera or it is inside a Stateflow or an MATLAB Function block."?
HDL Coder is trying to backannotate the place and route timing results from Altera back onto your Simulink diagram. Due to namin...

circa 11 anni fa | 0

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hdl verifier and record type
HDL Verifier does not support record types.

circa 11 anni fa | 0

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Matlab C code or VHDL code import?
For HDL Coder's side, you can import arbitrary code using the Black Box capability. It is well documented and has examples that ...

circa 11 anni fa | 0

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How to force hdl coder to generate one vhd file for each single RAM library block used in the model.
There is no option to disable the sharing of RAM files. Any identical RAMs will create multiple instances of the same RAM entity...

circa 11 anni fa | 0

Risposto
Error with HDL Coder ( size array )
You have declared |y, y_in|, and |y_qd| as being 0x0 arrays. You are then assigning them arrays with different dimensions. This ...

circa 11 anni fa | 0

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