Inviato
Enhanced and new bitwise operators in R2007b
This demo introduces new bitwise operators available in fixed point toolbox in R2007b
oltre 9 anni fa | 1 download |
Inviato
Modelling registers in Embedded MATLAB
This example shows how to use Embedded MATLAB to model memory elements
oltre 9 anni fa | 2 download |
Inviato
Modeling Mode Logic in Embedded MATLAB
Implementing Mealy and Moore FSMS in an Embedded MATLAB block
oltre 9 anni fa | 1 download |
Inviato
A 32 point FFT in embedded MATLAB using fixed point arithmetic
The attached model implements a 32 point fft using embedded MATLAB and fixed point arithmetic
oltre 9 anni fa | 2 download |
Inviato
DSP algorithms using Embedded MATLAB Block
using Embedded MATLAB block effectively in Simulink
oltre 9 anni fa | 1 download |
Inviato
HDL Cookbook examples with Embedded MATLAB
Patterns and examples of various hardware elements implemented using Embedded MATLAB
oltre 9 anni fa | 4 download |
Inviato
Cordic Implementation of Sin/Cos using embedded MATLAB
This model implements cordic algorithm using embedded MATLAB blocks
oltre 9 anni fa | 1 download |
Risposto
Matlab 2014b HDL coder, code generation failed.
Hello, Thank you for your question; we would like to investigate further on this issue and provide a workaround. Can you t...
Matlab 2014b HDL coder, code generation failed.
Hello, Thank you for your question; we would like to investigate further on this issue and provide a workaround. Can you t...
quasi 11 anni fa | 0
Risposto
Cannot find design 'main' on the path : HDL coder error
Can you tell us which version of MATLAB you are using? Thanks please make sure your project file (.prj) file is in the same f...
Cannot find design 'main' on the path : HDL coder error
Can you tell us which version of MATLAB you are using? Thanks please make sure your project file (.prj) file is in the same f...
circa 11 anni fa | 0
| accettato
Risposto
about using HDL coder
can you attach your MATLAB design and testbench? please let us know what version of MATLAB you are using. thanks
about using HDL coder
can you attach your MATLAB design and testbench? please let us know what version of MATLAB you are using. thanks
circa 11 anni fa | 0
| accettato
Risposto
How to avoid warnings regarding non-existent directory ?
Hi, I am not able to open the attachment. Based on your question, I recommend that you please check with Xilinx on this qu...
How to avoid warnings regarding non-existent directory ?
Hi, I am not able to open the attachment. Based on your question, I recommend that you please check with Xilinx on this qu...
circa 11 anni fa | 0
Risposto
Using variable-size data with Unbuffer Block ?
I forwarded your question to our HDLVerifier team. Thanks
Using variable-size data with Unbuffer Block ?
I forwarded your question to our HDLVerifier team. Thanks
circa 11 anni fa | 0
Risposto
HDL Code Generation "unhandled type"
you might have tried to generate code from the whole model. can you try this? makehdl('sfir_fixed/symmetric_fir')
HDL Code Generation "unhandled type"
you might have tried to generate code from the whole model. can you try this? makehdl('sfir_fixed/symmetric_fir')
circa 11 anni fa | 0
Risposto
how to generate an "inout" port by Simulink HDL coder?
this should work. thanks % codegen -config:hdl -args {ufi(0,32,0),true,uint8(0)} read_or_load_ram function output = re...
how to generate an "inout" port by Simulink HDL coder?
this should work. thanks % codegen -config:hdl -args {ufi(0,32,0),true,uint8(0)} read_or_load_ram function output = re...
oltre 11 anni fa | 0
Risposto
how to generate an "inout" port by Simulink HDL coder?
In 2014a we have added support for INOUT ports in HDLCoder. Bidirectional port specification: You can specify bidirectiona...
how to generate an "inout" port by Simulink HDL coder?
In 2014a we have added support for INOUT ports in HDLCoder. Bidirectional port specification: You can specify bidirectiona...
oltre 11 anni fa | 0
Risposto
HDL Coder and LEC tools
Can you please contact technical support with specific issues? HDLCoder generates synthesizable HDL code (VHDL and Verilog) fro...
HDL Coder and LEC tools
Can you please contact technical support with specific issues? HDLCoder generates synthesizable HDL code (VHDL and Verilog) fro...
quasi 12 anni fa | 0
Risposto
Does HDL coder supports electrical blocks(tool boxes like power system,power electronics etc) to convert in to VHDL code? Please let me know which tool boxes it supports.
We would love to know more about this request. Can you please contact technical support on what additional blocks you would like...
Does HDL coder supports electrical blocks(tool boxes like power system,power electronics etc) to convert in to VHDL code? Please let me know which tool boxes it supports.
We would love to know more about this request. Can you please contact technical support on what additional blocks you would like...
quasi 12 anni fa | 0
Risposto
issue in HDL coding tutorial on Matlab R2012a
This is a known issue in R2012a and has been in subsequent releases.
issue in HDL coding tutorial on Matlab R2012a
This is a known issue in R2012a and has been in subsequent releases.
quasi 12 anni fa | 0
Risposto
HDL Coder IPCore Interface configuration scriptable?
There is no published API to script IP Core generation in Simulink. Please contact technical support for more info and planned e...
HDL Coder IPCore Interface configuration scriptable?
There is no published API to script IP Core generation in Simulink. Please contact technical support for more info and planned e...
quasi 12 anni fa | 0
| accettato
Risposto
How do I convert an unsigned integer to a signed integer without causing an overflow or using TYPECAST in Simulink 7.9 (R2012a)?
Use *reinterpretcast* to convert an unsigned number to signed number without causing overflow. The stored integer bits of the nu...
How do I convert an unsigned integer to a signed integer without causing an overflow or using TYPECAST in Simulink 7.9 (R2012a)?
Use *reinterpretcast* to convert an unsigned number to signed number without causing overflow. The stored integer bits of the nu...
quasi 12 anni fa | 1
Risposto
How to create a FFT ipcore for Zynq using Simulink HDL Coder?
Are you using "HDL FFT" or "HDL Streaming FFT" blocks shipping with HDLCoder? These support efficient HDL Code generation and us...
How to create a FFT ipcore for Zynq using Simulink HDL Coder?
Are you using "HDL FFT" or "HDL Streaming FFT" blocks shipping with HDLCoder? These support efficient HDL Code generation and us...
oltre 12 anni fa | 0
Risposto
Problems in converting Matlab code to VERILOG (HDL Coder)
Please contact technical support with the MATLAB code. Most likely you are running into an operation or function which is no...
Problems in converting Matlab code to VERILOG (HDL Coder)
Please contact technical support with the MATLAB code. Most likely you are running into an operation or function which is no...
oltre 12 anni fa | 0
Risposto
HDL code generation in matlab
Can you contact MathWorks support with your code and someone will help you resolve the issue?
HDL code generation in matlab
Can you contact MathWorks support with your code and someone will help you resolve the issue?
oltre 12 anni fa | 0
Risposto
HDL code generation problem
Can you give us more details? what error are you seeing that led you to believe you have an issue with fiaccel? Thanks.
HDL code generation problem
Can you give us more details? what error are you seeing that led you to believe you have an issue with fiaccel? Thanks.
oltre 12 anni fa | 0
Risposto
HDL Coder Example - Problem
The demo is trying to show that if you execute the following sequence of commands you will have a working directory with write p...
HDL Coder Example - Problem
The demo is trying to show that if you execute the following sequence of commands you will have a working directory with write p...
oltre 12 anni fa | 0
Risposto
System Generator y HDL coder
I used google translate on your message. "Good afternoon, I'm back working on the disne with FPGA and want to develop my proj...
System Generator y HDL coder
I used google translate on your message. "Good afternoon, I'm back working on the disne with FPGA and want to develop my proj...
quasi 13 anni fa | 0
Risposto
HDL Coder: PN Sequence Generator block fails path balancing, how to work around this?
hi andrew, can you share the model which reproduces the issue? thanks. kiran.kintali@mathworks.com
HDL Coder: PN Sequence Generator block fails path balancing, how to work around this?
hi andrew, can you share the model which reproduces the issue? thanks. kiran.kintali@mathworks.com
circa 13 anni fa | 0
Risposto
About HDL simulink coder
Hi Pham, Can you send me the model that reproduce the failure? thanks. kiran.kintali@mathworks.com
About HDL simulink coder
Hi Pham, Can you send me the model that reproduce the failure? thanks. kiran.kintali@mathworks.com
circa 13 anni fa | 0
| accettato
Risposto
HDL implementation for bit to integer conversion block
Hi Mohamed, MATLAB function block can help develop customer routines like these very easily. check out the library of help...
HDL implementation for bit to integer conversion block
Hi Mohamed, MATLAB function block can help develop customer routines like these very easily. check out the library of help...
oltre 13 anni fa | 2
| accettato
Risposto
What is HDL IP?
The increasing complexity of the complete System-on-Chip (SOC) designs and the strict Time-to-Market design constraints are the ...
What is HDL IP?
The increasing complexity of the complete System-on-Chip (SOC) designs and the strict Time-to-Market design constraints are the ...
circa 15 anni fa | 1