DSP Builder

Automatically generate HDL for Altera FPGAs using Model-Based Design


  • Automatic code generation, implementation, and verification
  • Generate SystemVerilog or VHDL from Simulink models
  • Single environment to design algorithm, set desired data rate, clock frequency, and target device
  • Address last minute design specification changes in minutes
  • Shorten DSP design cycles
  • Flexible “white box” Fast Fourier transform (FFT) toolkit allows users to build custom FFTs


DSP Builder is Altera’s design tool that allows engineers to create high performance DSP systems using Model-Based Design. DSP Builder integrates Simulink® with Altera’s Quartus® Prime design software to configure Altera® FPGAs. DSP Builder includes both a Standard Blockset and Advanced Blockset for use within the Simulink library browser.

DSP Builder Advanced Blockset offers significant advantages in terms of design management and productivity for designing complex signal processing systems. Some of the key features of DSP Builder Advanced Blockset include:

  • Constraint-driven design
  • Automated resource sharing
  • Automated pipelining
  • Model silicon speeds while translating to HDL
  • Support high performance floating-point designs

Additional resources are available:
Learn how to target Altera FPGAs using HDL Coder
Learn how to use Altera DSP Builder Advanced Blockset with HDL Coder
Request trial of MathWorks software for use with Altera DSP Builder

Explore selected hardware support for Altera products.

Altera Corporation

101 Innovation Drive
San Jose, CA 95134
Tel: 408-544-7000
Fax: 408-544-6424

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  • Windows


  • E-mail
  • System integration
  • Telephone
  • Training

Product Type

  • Modeling and Simulation Tools


  • Data Acquisition or Import
  • Digital Signal Processing
  • Real-Time Systems
  • System Modeling and Simulation


  • Aerospace and Defense
  • Communication Infrastructure
  • Consumer Electronics
  • Semiconductor