T-VEC Tester for Simulink provides an integrated solution for model analysis, automatic test generation, test execution, and results analysis. It analyzes every path throughout the model hierarchy and generates test vectors that exercise the path boundaries. The test selection process produces unit, integration, and system-level test vectors most effective in revealing both decision and computational errors in logical, integer, and floating-point domains. Unreachable paths and other model errors are identified with hyperlinks to the Simulink model elements involved. Test sequence vectors support testing multiple sample times to verify dynamic system response.
T-VEC Tester for Simulink is used by engineers who develop and test embedded applications with Simulink. It analyzes the compiled version of the Simulink model generated by the Simulink Coder to identify defects in the model and generate comprehensive test suites. Test drivers are automatically generated for executing the tests against the C source code generated by the Simulink Coder or for driving simulations within MATLAB. Testing activities from test design to test result analysis are fully automated. Qualification materials are available for software certification of safety critical applications based on the DO-178B guidelines.
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