Guideline for Using Sqrt Block for HDL Code Generation

Follow these guidelines when you use Sqrt blocks in your model to improve performance in terms of frequency, area, and accuracy.

Each guideline has a severity level that indicates the level of compliance requirements. To learn more, see HDL Modeling Guidelines Severity Levels.

Use SqrtFunction Architecture for Square Root Block

Guideline ID

2.11.1

Severity

Recommended

Description

When you use the Sqrt block in your model, set the HDL architecture to SqrtFunction for improved circuit area, timing on FPGA target, and accuracy. Using this architecture for a Sqrt block has several advantages over the Newton-Raphson-based architectures. The table compares synthesis results between the different HDL architectures of the Sqrt block. The results in this table are from Sqrt operation on a logic synthesis with the uint8 data type on an Xilinx^® Kintex^® 7 XC7K325T FFG900 device.

Sqrt Block Synthesis Results
Architecture	Iterations	Maximum Frequency (in MHz)	FPGA Resource Usage
			LUTs	Registers	DSPs
SqrtFunction	No iteration settings	354	20	49	0
SqrtNewton	3	189	290	137	3
	5		338	187	5
RecipSqrtNewton	3	185	141	164	4
	5		203	246	6
SqrtNewtonSingleRate	3	228	601	318	6
	5		839	468	10
RecipSqrtNewtonSingleRate	3	246	208	318	11
	5		317	484	17

By selecting the SqrtFunction architecture, you can also enable UseMultiplier property to compute the square root by using multipliers. This property is off by default and the square root is computed using the shift-add algorithm.

You can increase the design frequency and reduce resource utilization by setting the UseMultiplier to off and LatencyStrategy to inherit.

If you choose to use the Newton-Raphson-based architectures, follow these design guidelines:

• When designing a model for high frequency, use single-rate architectures such as SqrtNewtonSingleRate or RecipSqrtNewtonSingleRate. The resource consumption for single rate implementation is high because the implementation is performed without overclocking.

• You can increase the iterations for single-rate architecture to improve the accuracy. Recommended iteration values are between 3 to 10. However, even a greater number of iterations cannot make single-rate implementation more accurate than the SqrtFunction architecture. The simulation results of the Sqrt block with SqrtFunction architecture are the same as those of Simulink. By contrast, the simulation results for Newton-Raphson-based implementation can yield results that are less accurate and numerically different.

• Increasing number of iteration can increase latency and resource consumption. Additional cycles of latency depends on the architecture and iterations. For more information, see HDL Code Generation section in Sqrt.