Performs clock data recovery function
System object™ provides clock sampling times and estimates data symbols at the receiver using a
first order phase tracking CDR model. For more information, see
Clock and Data Recovery in SerDes System.
To provide clock data locations:
serdes.CDRobject and set its properties.
Call the object with arguments, as if it were a function.
To learn more about how System objects work, see What Are System Objects?
returns a CDR object that
determines the clock sampling times and estimates the data symbol according to the
Bang-Bang CDR algorithm. It does not return or modify the incoming
cdr = serdes.CDR
cdr = serdes.CDR(
sets properties using one or more name-value pairs. Enclose each property name in quotes.
Unspecified properties have default values.
cdr = serdes.CDR('Count',8) returns a CDR object with early
or late CDR count threshold of 8.
Unless otherwise indicated, properties are nontunable, which means you cannot change their
values after calling the object. Objects lock when you call them, and the
release function unlocks them.
If a property is tunable, you can change its value at any time.
For more information on changing property values, see System Design in MATLAB Using System Objects.
CDRMode — Determine CDR order
1st order (default) |
Determine the CDR order to enable phase and frequency tracking.
1st order— Only tracks the phase.
2nd order— Tracks both the phase and frequency.
Count — Early or late CDR count threshold to trigger phase update
16 (default) | real positive integer ≥4
Early or late CDR count threshold to trigger a phase update, specified as a
unitless real positive integer ≥4. Increasing the value of
provides a more stable output clock phase at the expense of convergence speed. Because
the bit decisions are made at the clock phase output, a more stable clock phase has a
better bit error rate (BER).
Count also controls the bandwidth of the CDR which is
approximately calculated by using the equation:
Step — Clock phase resolution
0.0078 (default) | real scalar
Clock phase resolution, specified as a real scalar in fraction of symbol time.
Step is the inverse of the number of phase adjustments in
PhaseOffset — Clock phase offset
0 (default) | real scalar in the range [-0.5,0.5]
Clock phase offset, specified as a real scalar in the range [-0.5,0.5] in fraction
of symbol time.
PhaseOffset is used to manually shift clock
probability distribution function (PDF) for better bit error rate (BER).
ReferenceOffset — Reference clock offset impairment
0 (default) | real scalar ≤300
Reference clock offset impairment, specified as a real scalar ≤300 in parts per
ReferenceOffset is the deviation between
transmitter oscillator frequency and receiver oscillator frequency.
Sensitivity — Sampling latch meta-stability voltage
0 (default) | real scalar
Sampling latch meta-stability voltage, specified as a real scalar in volts. If the
data sample voltage lies within the region (+/-
there is a 50% probability of bit error.
PhaseDetector — Clock phase detector option
BangBang (default) |
Clock phase detector option used in the clock data recovery. You can choose between bang-bang (Alexander) or baud-rate type-A (Mueller-Muller).
FrequencyStep — Internal gain for frequency tracking
1/2e11 (default) | nonnegative real scalar
Internal gain for the frequency tracking loop, specified as a nonnegative real scalar.
FrequencyCount — Frequency tracking update
16 (default) | nonnegative integer scalar
FrequencyCount symbols, update the system phase
rotator clock with the frequency estimate.
SymbolTime — Time of single symbol duration
1e-10 (default) | real scalar
Time of a single symbol duration, specified as a real scalar in s.
SampleInterval — Uniform time step of waveform
6.25e-12 (default) | real scalar
Uniform time step of the waveform, specified as a real scalar in s.
Modulation — Modulation scheme
2 (default) |
Modulation value that specifies the modulation scheme, the number of logic levels
in the encoded signal, specified as
|Modulation Value||Modulation Scheme|
|Non-return to zero (NRZ)|
|Three-level pulse amplitude modulation (PAM3)|
|Four-level pulse amplitude modulation (PAM4)|
|Eight-level pulse amplitude modulation (PAM8)|
|Sixteen-level pulse amplitude modulation (PAM16)|
According to IBIS BIRD (Buffer Issue Resolution Document) 213, IBIS-AMI models support any level of signaling from PAM2 (NRZ) to upwards, collectively known as PAMn. If your EDA tool supports it, you can export IBIS-AMI models supporting modulation schemes NRZ, PAM3, PAM4, PAM8, or PAM16.
WaveType — Input wave type form
'Sample' (default) |
Input wave type form:
'Sample'— A sample-by-sample input signal.
'Impulse'— An impulse response input signal.
x — Input baseband signal
Input baseband signal. The input to the CDR must be applied as one sample at a time and not as a vector.
Phase — Relative recovered clock phase
units of Symbol Time in the range [0,1]
Relative recovered clock phase, returned as a units of Symbol Time in the range [0,1].
clkAMI — AMI clock bus
AMI clock bus, returned as a structure.
|Time taken to sample the data signal.|
|Valid clock time value on the rising edge of a signal.|
interior — Bus containing additional interior CDR signals
Bus containing additional interior CDR signals, returned as a structure.
|Relative clock phase in units of |
|Symbol recovered from data signal at
|Voltage observed from the data signal at
|The estimated upper eye at PAM4 threshold.|
|The voltage observed from the data signal at |
|The bang-bang CDR internal counter used to trigger samples.|
|The bang-bang CDR accumulated (or filtered) signal used to trigger updated to the CDR phase.|
|Estimated PAM4 symbol voltage of the inner eye outer envelope to estimate PAM threshold.|
|Estimated PAM4 outer envelope voltage to estimate PAM threshold.|
|Estimates eye height.|
|Array of PAM thresholds for each eye in the PAMn modulation. If the modulation scheme is PAMn, the first (n-1) eyes contain the valid thresholds. The rest of the entries are zero-padded.|
|Phase detector error.|
|Frequency estimate for the 2nd order or frequency tracking loop.|
To use an object function, specify the
System object as the first input argument. For
example, to release system resources of a System object named
Clock Distribution Recovery with CDR
This example shows how to recover clock distribution using
serdes.CDR system object™.
Use a symbol time of
100 ps and
16 samples per symbol. The channel has
5 dB loss.
SymbolTime = 100e-12; SamplesPerSymbol = 16; dt = SymbolTime/SamplesPerSymbol; loss = 5; chan = serdes.ChannelLoss('Loss',loss,'dt',dt,... 'TargetFrequency',1/SymbolTime/2,'RiseTime',SamplesPerSymbol/4*dt);
Create a random data pattern using a pseudorandom binary sequence of order 10.
ord = 10; %PRBS order nrz=prbs(ord,2^ord-1); nrzPattern = nrz(:)' - 0.5; %[0,1] --> [-0.5,0.5]; ChannelPulseResponse = impulse2pulse(chan.impulse, SamplesPerSymbol, dt); waveprbs = pulse2wave(ChannelPulseResponse(:,1),nrzPattern,SamplesPerSymbol); wave2 = [waveprbs; waveprbs];
Create the CDR object that utilizes NRZ modulation scheme.
CDR1 = serdes.CDR('Modulation',2,'Count',8,'Step',1/64,... 'SymbolTime',SymbolTime,'SampleInterval',dt);
Initialize the outputs.
phase = zeros(1,length(wave2)); CDRearlyLateCount = zeros(1,length(wave2));
Feed the waveform one sample at a time through the CDR object.
for ii = 1:length(wave2) [phase(ii), ~, optional] = CDR1(wave2(ii)); CDRearlyLateCount(ii) = optional.CDRearlyLateCount; end
Plot the eye diagram with recovered clock distribution, clock phase vs. time, and early/late count threshold vs. time.
t = (0:length(wave2)-1)/SamplesPerSymbol; teye = (0:SamplesPerSymbol-1)/SamplesPerSymbol; eyed = reshape(wave2,SamplesPerSymbol,); figure, subplot(2,2,[1,3]), yyaxis left, plot(teye,eyed, '-b'), title('Eye Diagram with Recovered Clock Distribution') xlabel('Symbol Time'), ylabel('Voltage') yyaxis right, histogram(phase,SamplesPerSymbol/2) set(gca,'YTick',) subplot(2,2,2), plot(t,phase) xlabel('Number of Symbols'), ylabel('Symbol Time'); title('Clock Phase vs. Time') subplot(224), plot(t,CDRearlyLateCount) xlabel('Number of Symbols'), ylabel('Count') title('Early/Late Count Threshold vs. Time')
Choose Phase Detector Model in Clock Recovery
You can select which phase detector model the
serdes.CDR in clock
recovery: bang-bang or baud-rate type A. The default phase detector model used is
You can use a CDR with baud-rate type-A phase detector model in the SerDes Designer app and then export the model to Simulink®. In this case, automatically adds the Rx_Decision_Time parameter to define the clock position.
If you want to change the phase detector model in Simulink, you need to manually add the Rx_Decision_Time parameter.
You must click the Refresh Init button in the Rx Init subsystem after modifying the Rx_Decision_Time parameter.
C/C++ Code Generation
Generate C and C++ code using MATLAB® Coder™.
Usage notes and limitations:
IBIS-AMI codegen is not supported in MAC.
Introduced in R2019a