PCIe5 Transmitter/Receiver IBIS-AMI Model

This example shows how to create IBIS-AMI models for a PCI-Express Generation 5 (PCIe Gen5) transmitter and receiver using the library blocks in SerDes Toolbox™. The IBIS-AMI models generated by this example can be used in Serial Link Designer from Signal Integrity Toolbox™ and conform to the PCIe Gen5 Base-Specification published by the PCI-SIG.

PCIe Gen5 Tx/Rx IBIS-AMI Model Setup in SerDes Designer App

The first part of this example sets up the target transmitter and receiver AMI model architecture using the blocks required for PCIe Gen5 in the SerDes Designer app. The model is then exported to Simulink® for further customization.

This example uses the SerDes Designer model pcie5_ibis_txrx. Type the following command in the MATLAB® command window to open the model:

>> serdesDesigner('pcie5_ibis_txrx');

Configuration Setup

• Symbol Time is set to 31.25 ps, since the maximum allowable PCIe Gen5 data rate is 32 GT/s with a Nyquist frequency of 16GHz.

• Target BER is set to 1e-12 (BER as defined by the PCIe Gen5 BASE specification).

• Samples per Symbol is set to 16.

• Modulation is set to NRZ (non-return to zero).

• Signaling is set to Differential.

Transmitter Model Setup

• The Tx FFE block is set up for one pre-tap, one main tap, and one post-tap by including three tap weights [0 0.75 -0.25]. Specific tap presets can be configured later in the example when the model is exported to Simulink.

• The Tx AnalogOut model is set up so that Voltage is 1V, Rise time is 12 ps, R (output resistance) is 50 Ohms (Table 8-10 note 3) , and C (capacitance) is 0.5 pF according to the PCIe Gen5 specification.

Channel Model Setup

• Channel loss is set to 24 dB (37 dB is maximum loss for Base channel plus CEM card).

• Differential impedance is set to 85 Ohms (see PCIe Gen5 Base Spec, section 8.4.1.2, Figure 8-28 and 8-29).

• Target Frequency is set to the Nyquist frequency for 32GT/s data rate, which is 16 GHz.

Receiver Model Setup: Find the CTLE GPZ Matrix from the PCIe Gen5 BASE Specification

You can see from the loaded model, that the Rx CTLE block is setup for 11 configurations (0 through 10) to accommodate the Gain range of -5 to -15dB for this peaking filter. The code below shows you how a method to find a GPZ Matrix for the CTLE block using the transfer equation provided by the PCIe Gen5 Base Specification (Equation 8-7):

% Based on the PCIe Gen5 Base Specification, Equation 8-7:
DCgain = 5:15; %Adc defined as a range from -5 to -15dB.
ADC = 10.^(-DCgain/20);
z1 = 450e6; %Hz
wz1 = 2*pi*z1;
p1 = 1.65*z1; %Hz
wp1 = 2*pi*p1;
p2 = 9.5e9; %Hz
wp2 = 2*pi*p2;
p3 = 28e9; %Hz
wp3 = 2*pi*p3;
p4 = 28e9; %Hz
wp4 = 2*pi*p4;

f = linspace(0,100e9,1001);
w = 2*pi*f;
s = 1j*w;

H = zeros(length(ADC),length(f));

for ii = 1:length(ADC)
    z2(ii) = abs(ADC(ii))*p2;
    wz2(ii) = 2*pi*z2(ii);
    H(ii,:) = ((wp1*wp3*wp4)/(wz1)).*(((s+wz1).*(s+wp2*ADC(ii)))./((s+wp1).*(s+wp2).*(s+wp3).*(s+wp4)));
end

figure(1)
ax1(1) = subplot(211);
semilogx(f,db(H))
grid on
xlabel('Hz')
ylabel('dB')
title('Reference CTLE from PCIe 5.0 BASE Spec, Equation 8-7')
ax1(2) = subplot(212);
semilogx(f,unwrap(angle(H)))
grid on
xlabel('Hz')
ylabel('Radians')
linkaxes(ax1,'x')

%Define gpz matrix:
gpz = zeros(length(ADC),8);
gpz(:,1) = -DCgain;
gpz(:,2) = -p1;
gpz(:,3) = -z1; %z1
gpz(:,4) = -p2;
gpz(:,5) = -z2;
gpz(:,6) = -p3;
%Note: column 7 is already set to all zeros.
gpz(:,8) = -p4;

Receiver Model Setup

• The Rx AnalogIn model is set up so that R (input resistance) is 50 Ohms (Table 8-10 note 3), and C (capacitance) is 0.5 pF according to the PCIe Gen5 specification. 

• For the Rx CTLE block, set the FilterMethod to Cascaded to accommodate repeated poles as detailed in the PCIe Gen5 Base Specification (Equation 8-7). The Rx CTLE set up for 11 configurations (0 to 10) and the associated GPZ Matrix matches the Poles and Zeros given in the PCIe Gen5 Base Specification.

• The Rx DFE/CDR block is set up for three DFE taps. The limits for each tap have been individually defined according to the PCIe Gen5 specification to +/-80 mV for tap 1, +/-20 mV for tap 2, and +/-20 mV for tap 3. 

Plot Statistical Eye Diagram and BER

You can use various plot types in SerDes Designer to visualize the output and performance of the PCIe Gen5 system. You can test the Rx CTLE functionality by setting its Mode to fixed and Configuration to 10. Select the BER plot from the "ADD Plots" menu in the toolstrip and observe the Statistical Eye Diagram is displayed along with BER.

Note: Confirm that all Jitter Parameters are disabled by clicking on the Tx/Rx Jitter button in the toolstrip and disabling the check boxes for each type of Jitter, and observe the effect on the plot for the eye diagram, as it becomes larger as each Jitter type is disabled:

Before continuing, confirm the Rx CTLE Mode is set to Adapt. Setting this value for the RX CTLE will avoid the need to set it again after the model has been exported to Simulink.

Jitter Setup for Transmitter and Receiver

You can enable or disable which jitter parameters are exported to Simulink by enabling the check boxes for Tx_DCD, Tx_Rj, Tx_Dj, x_DCD, Rx_Rj, and Rx_Dj. If they are disabled, they will not be exported. In the following section, enable each of the values, and confirm the settings.

Note: you can also add jitter parameters in Simulink using the IBIS-AMI manager.  

Tx Jitter Parameters

You can verify the Jitter parameters are set correctly by referencing the PCIe Gen5 Base specification, table 8-6, "Data Rate Dependent Transmitter Parameters."  

Note: These parameters will export as type "Float" with format "Value." After exporting to Simulink, you can change these to format "Range" using the IBIS-AMI Manager. 

Tx DCD Jitter Value (Ttx-upw-tj from Table 8-6 in the PCIe Gen5 Base Spec) 

• Confirm value is 6.25e-12 (Note: this is the maximum allowed per specification).

• Confirm units is set to seconds.

• Enable Tx_DCD.

Tx Rj Jitter Value (Ttx-rj from table 8-6) 

• Confirm value is 0.45e-12 (Note: this is the maximum allowed per specification).

• Confirm units is set to seconds.

• Enable Tx_Rj.

Tx Dj Jitter Value (Ttx-upw-djdd from Table 8-6) 

• Confirm value is 2.5e-12 (Note: this is the maximum allowed per specification).

• Confirm units is set to seconds.

• Enable Tx_Dj.

Rx Jitter Parameters

Rx DCD Jitter Values 

• Confirm value is 0.

• Confirm units is set to seconds.

• Enable Rx_DCD.

Rx Rj Jitter Values (Trx-st-rj from Table 8-9) 

• Confirm value is 0.5e-12 to seconds (Note: this is the maximum allowed per specification).

• Confirm units is set to seconds.

• Enable Rx_DCD.

Rx Dj Jitter Values 

• Confirm value is 0.

• Confirm units is set to seconds.

• Enable Rx_Dj.

You may observe that the Statistical Eye and BER plot is nearly closed, but this is expected. The jitter parameters from the specification are maximum allowed values and there is no expectation they would each be maximum at the same time in a real world system. The reason you are enabling these jitter parameters is so they are automatically included in this SerDes System when exporting to Simulink. Later you will see how to change these to ranges and set each one to 0 as a default value. 

Note: After exporting to Simulink, you can also edit their Type, Usage, Format, and Value using the IBIS-AMI manager. 

Export SerDes System to Simulink

Click on the Export button in the toolstrip to export the above configuration to Simulink for further customization and generation of the IBIS-AMI model files.

PCIe Gen5 Tx/Rx IBIS-AMI Model Setup in Simulink

The second part of this example takes the SerDes system exported by the SerDes Designer app and customize it as required for PCIe Gen5 in Simulink. You can also open the support file attached to this example pcie5_ibis_txrx.slx and explore the system in Simulink. The following steps show how to configure the details of the system to prepare for exporting IBIS-AMI models.

Review Simulink Model Setup

The SerDes System imported into Simulink consists of Configuration, Stimulus, Tx, Analog Channel and Rx blocks. All the settings from the SerDes Designer app have been transferred to the Simulink model. Save the model and review each block setup.

• You can confirm settings are carried over from the SerDes Designer app by double clicking the Configuration block and the Analog Channel block. Then open the Block Parameters dialog box and check their values.

• Double click the Stimulus block to open the Block Parameters dialog box. You can customize the Stimulus pattern here by configuring pattern and number of number of symbols to simulate. This block is not carried over from the SerDes Designer app.

• You can double click the Tx block and the Rx block to look inside each of their subsystems which are inherited from the SerDes Designer app.

Set Ignore Bits

Before running the simulation, open the IBIS-AMI Manager. You can set the “bits to ignore” for the Tx to 3, because the FFE has 3 taps. Also, you can see that “bits to ignore” for the Rx is 1000 (default), which should be a sufficient value for the DFECDR to converge during time domain simulation.

Update Tx Jitter Parameters

You can change the Format to "Range" for the Jitter Parameters by clicking on the AMI - Tx tab, select Tx_DCD and press the Edit button.

The following ranges allow you to fine-tune the jitter values to meet PCIe Gen5 jitter mask requirements. For example, see table 8-6, "Data Rate Dependent Transmitter Parameters" in the PCIe Gen5 Base specification.

Set Tx DCD Jitter Values (Ttx-upw-tj from Table 8-6)

• Select Tx_DCD, then click the Edit... button to bring up the Add/Edit AMI Parameter dialog.

• Verify the Type to Float.

• Change the Format to Range.

• Set the Current Value to 0.

• Set the Typ value to 0.

• Set the Min value to 0.

• Set the Max value to 6.25e-12.

• Click OK to save the changes.

Set Tx Rj Jitter Values (Ttx-rj from table 8-6)

• Select Tx_Rj, then click the Edit... button to bring up the Add/Edit AMI Parameter dialog.

• Follow the steps for Tx_DCD, above.

• Set the Max value to 0.45e-12.

• Click OK to save the changes.

Set Tx Dj Jitter Values (Ttx-upw-djdd from Table 8-6)

• Select Tx_Dj, then click the Edit... button to bring up the Add/Edit AMI Parameter dialog.

• Follow the steps for Tx_DCD, above.

• Set the Max value to 2.5e-12.

• Click OK to save the changes.

Update Receiver AMI Parameters

Open the AMI-Rx tab in the SerDes IBIS/AMI manager dialog box. Following the format of a typical AMI file, the reserved parameters are listed first followed by the model specific parameters.

Update Rx Jitter Parameters

Select the Rx_DCD, Rx_Dj and Rx_Rj and follow the steps above from Tx_DCD. The following ranges allow you to fine-tune the jitter values for your own system.

Set Rx DCD Jitter Values

• Select Rx_DCD, then click the Edit... button to bring up the Add/Edit AMI Parameter dialog.

• Change the Type to Float.

• Change the Format to Range.

• Set the Current Value to 0.

• Set the Typ value to 0.

• Set the Min value to 0.

• Set the Max value to 0.

• Click OK to save the changes.

Set Rx Rj Jitter Values (Trx-st-rj from Table 8-9)

• Select Rx_Rj, then click the Edit... button to bring up the Add/Edit AMI Parameter dialog.

• Follow the steps for Rx_DCD.

• Set the Max value to 0.5e-12.

• Click OK to save the changes.

Set Rx Dj Jitter Values

• Select Rx_Dj, then click the Edit... button to bring up the Add/Edit AMI Parameter dialog.

• Follow the steps for Rx_DCD.

• Click OK to save the changes.

Note: you can close the IBIS AMI Manager for the next section, you can revisit this dialog to export IBIS-AMI models later.

Review Tx FFE Block

• Inside the Tx subsystem, double click the FFE block to open the FFE Block Parameters dialog box.

• Verify that the current value of Mode is set to Fixed.

Review Rx CTLE Block

• Inside the Rx subsystem, double click the CTLE block to open the Block Parameters dialog box.

• Gain pole zero data is carried over from the SerDes Designer app. This gain pole zero data applies the transfer function of the behavioral CTLE given by the PCIe Gen5 Base Specification.

• CTLE Mode is set to Adapt, which means an optimization algorithm built into the CTLE system object selects the optimal configuration at run time.

Review Rx DFECDR Block

• Inside the Rx subsystem, double click the DFECDR block to open the DFECDR Block Parameters dialog box.

• Expand the IBIS-AMI parameters to show the list of parameters to be included in the IBIS-AMI model.

• The DFE tap value(s) are carried over from the SerDes Designer app.

Generate PCIe Gen5 Tx/Rx IBIS-AMI Model

The final part of this example takes the customized Simulink model, modifies the AMI parameters for PCIe Gen5, then generates IBIS-AMI compliant model files.

Open the Block Parameter dialog box for the Configuration block and click on the Open SerDes IBIS/AMI Manager button. In the IBIS tab inside the SerDes IBIS/AMI manager dialog box, the analog model values are converted to standard IBIS parameters that can be used by any industry standard simulator. In the AMI-Rx tab in the SerDes IBIS/AMI manager dialog box, the reserved parameters are listed first followed by the model specific parameters following the format of a typical AMI file.

Update Transmitter AMI Parameters

Open the AMI-Tx tab in the SerDes IBIS/AMI manager dialog box. Following the format of a typical AMI file, the reserved parameters are listed first followed by the model specific parameters.

You how to set the TX FFE tap values by creating new AMI parameters and implementing an algorithm in the Init customer specific code section to select PCIe Gen5 Preset values P0 through P10.

• Click on the FFE parameter listed under the Model_Specific parameter, then click on the button “Add Parameter.” Then configure the options in the dialog as follows:

• Parent Node: FFE (default)

• Parameter name: ConfigSelect

• Current value: User Defined

• Description: PCIe Gen5 Tx tap weights configuration

• Usage: In

• Type: Integer

• Format: List

• Default: -1 (-1 is used to select “user defined” taps, it is not a preset from the specification)

• List values: [-1 0 1 2 3 4 5 6 7 8 9]

• List_Tip values: ["User Defined" "P0" "P1" "P2" "P3" "P4" "P5" "P6" "P7" "P8" "P9"]

Note: When you directly specify the preset coefficients, you change the format of the three TapWeights and specify the exact value to use for each preset. Only these eleven defined presets will be allowed, and all three taps must be set to the same preset to get the correct values.

Modify Init to Select Presets for Preshoot Tap, Main Tap, and De-emphasis Tap

Modify the Initialize MATLAB function inside the Init block in the Tx subsystem to use the newly added ConfigSelect parameter. The ConfigSelect parameter controls the existing three transmitter taps. To accomplish this, add a switch statement that takes in the values of ConfigSelect and automatically sets the values for all three Tx taps, ignoring the user defined values for each tap. If a ConfigSelect value of -1 is used, then the user-defined Tx tap values are passed through to the FFE datapath block unchanged.

Inside the Tx subsystem, double-click the Init block to open the Block Parameters dialog box and click the Refresh Init button to propagate the new AMI parameter to the Initialize sub-system. Then click the Show Init button to open the function in an editor window.

Note: You can also type Ctrl-U to look under the mask for the Init block, then double-click on the initialize block to open the Initialize Function.

Double-click on the impulseEqualization MATLAB function block to open the function in MATLAB. This is an automatically generated function which provides the impulse response processing of the SerDes system block (IBIS AMI-Init). The %% BEGIN: and % END: lines denote the section where custom user code can be entered. Data in this section will not get over-written when Refresh Init is run:

To add the custom ConfigSelect control code, scroll down the Customer user code area, comment out the FFEParameter.ConfigSelect line, then enter the following code:

%% BEGIN: Custom user code area (retained when 'Refresh Init' button is pressed)

%FFEParameter.ConfigSelect; % User added AMI parameter

switch FFEParameter.ConfigSelect

case -1 % User defined tap weights

FFEInit.TapWeights = FFEParameter.TapWeights;

case 0 % PCIe Configuration: P0

FFEInit.TapWeights = [0.000 0.750 -0.250];

case 1 % PCIe Configuration: P1

FFEInit.TapWeights = [0.000 0.830 -0.167];

case 2 % PCIe Configuration: P2

FFEInit.TapWeights = [0.000 0.800 -0.200];

case 3 % PCIe Configuration: P3

FFEInit.TapWeights = [0.000 0.875 -0.125];

case 4 % PCIe Configuration: P4

FFEInit.TapWeights = [0.000 1.000 0.000];

case 5 % PCIe Configuration: P5

FFEInit.TapWeights = [-0.100 0.900 0.000];

case 6 % PCIe Configuration: P6

FFEInit.TapWeights = [-0.125 0.875 0.000];

case 7 % PCIe Configuration: P7

FFEInit.TapWeights = [-0.100 0.700 -0.200];

case 8 % PCIe Configuration: P8

FFEInit.TapWeights = [-0.125 0.750 -0.125];

case 9 % PCIe Configuration: P9

FFEInit.TapWeights = [-0.166 0.834 0.000];

otherwise

FFEInit.TapWeights = FFEParameter.TapWeights;

end

% END: Custom user code area (retained when 'Refresh Init' button is pressed)

To test that the new FFE control parameter is working correctly, open the SerDes IBIS-AMI Manager dialog box from the Configuration block. In the AMI-Tx tab, edit the ConfigSelect parameter to set Current value to P7. This corresponds to PCIe Configuration P7: Pre = -0.100, Main = 0.700 and Post = -0.200.

Modify GetWave to Select Presets for Preshoot Tap, Main Tap, and De-emphasis Tap

To modify GetWave, add a new MATLAB function that operates in the same manner as the Initialize function.

Inside the Tx subsystem, type Ctrl-U to look under the mask of the FFE block.

You can see that a new constant block has been added called FFEParameter.ConfigSelect. This is created automatically by the IBIS-AMI Manager when a new Reserved Parameter is added. Next, you can follow these steps to re-configure the selection of tap weight presets for time domain (GetWave) simulation:

• Add a MATLAB Function block to the canvas from the Simulink/User-Defined library.

• Rename the MATLAB Function block to PCIe5FFEconfig.

• Double-click the MATLAB Function block and replace the template code with the following:

% PCIe5 tap configuration selector

% Selects pre-defined Tx FFE tap weights based on PCIe5 specified

% configurations.

% Inputs:

% TapWeightsIn: User defined floating point tap weight values.

% ConfigSelect: 0-9: PCIe4 defined configuration (P0-P9).

% -1: User defined configuration (from TapWeightsIn).

% Outputs:

% TapWeightsOut: Array of tap weights to be used.

function TapWeightsOut = PCIe5FFEconfig(TapWeightsIn, ConfigSelect)

switch ConfigSelect

case -1 % User defined tap weights

TapWeightsOut = TapWeightsIn;

case 0 % PCIe Configuration: P0

TapWeightsOut = [0.000 0.750 -0.250];

case 1 % PCIe Configuration: P1

TapWeightsOut = [0.000 0.833 -0.167];

case 2 % PCIe Configuration: P2

TapWeightsOut = [0.000 0.800 -0.200];

case 3 % PCIe Configuration: P3

TapWeightsOut = [0.000 0.875 -0.125];

case 4 % PCIe Configuration: P4

TapWeightsOut = [0.000 1.000 0.000];

case 5 % PCIe Configuration: P5

TapWeightsOut = [-0.100 0.900 0.000];

case 6 % PCIe Configuration: P6

TapWeightsOut = [-0.125 0.875 0.000];

case 7 % PCIe Configuration: P7

TapWeightsOut = [-0.100 0.700 -0.200];

case 8 % PCIe Configuration: P8

TapWeightsOut = [-0.125 0.750 -0.125];

case 9 % PCIe Configuration: P9

TapWeightsOut = [-0.166 0.834 0.000];

otherwise

TapWeightsOut = TapWeightsIn;

end

Re-wire the FFE sub-system so that the FFETapWeights and FFEConfigSelect constant blocks connect to the inputs of the newly defined PCIe5FFEconfig MATLAB function block. The TapWeightsOut signal from the PCIe4FFEconfig block connects to the TapWeights port of the FFE block.

Run the SerDes System Model in Simulink

You can now run the model to simulate the SerDes System. Many plots are generated, including a live time-domain (GetWave) eye diagram that is updated as the model is running.

The second plot contains views of the statistical (Init) results and persistent time domain (GetWave) results, similar to what is available in the SerDes Designer App.

You may notice that the eye height can differ between Statistical and Time Domain. There are many possible reasons for larger eye diagram openings in Time Domain: one example could be use of encoding in the Stimulus to control ISI, another example could be active behavior of a DFE, etc. You can explore the system to visualize its performance while changing various characteristics such as setting CTLE to fixed, etc.

Export IBIS-AMI Models

Open the Export tab in the SerDes IBIS/AMI manager dialog box.

• Verify the Tx model name is pcie_g5_tx.

• Verify the Rx model name is pcie_g5_rx.

• Note that the Tx and Rx corner percentage is set to 10. This will scale the min/max analog model corner values by +/-10%.

• Verify that Dual model is selected for both the Tx and the Rx AMI Model Settings. This will create model executables that support both statistical (Init) and time domain (GetWave) analysis.

• Set the Tx model Bits to ignore value to 3 since there are three taps in the Tx FFE.

• Set the Rx model Bits to ignore value to 1000 to allow sufficient time for the Rx DFE taps to settle during time domain simulations.

• Set Models to export as Both Tx and Rx so that all the files are selected to be generated (IBIS file, AMI files and DLL files).

• Set the IBIS file name to be pcie5ami.

• Press the Export button to generate models in the Target directory.

Test Generated IBIS-AMI Models

The PCIe Gen5 transmitter and receiver IBIS-AMI models are now complete and ready to be utilized in any industry standard EDA tool capable of IBIS-AMI simulation.

References

[1] PCI-SIG, https://pcisig.com.