Model Development Processes

model-based design – Development process that uses a system model as an executable specification throughout development. The process supports model and model component design, model simulation of dynamic behavior, code generation from the model, and continuous test and verification.

software-in-the-loop (SIL) simulation – Development process where compiled source code on a development computer executes as a separate process from the rest of the Simulink model. Typical goals include initial source code testing and verification by comparing software-in-the-loop results with model simulation results and system requirements.

In the following example, to run a software-in-the-loop simulation for the controller, right-click the Model block labeled control model and then select Block parameters. From the Simulation mode list, select Software-in-the-loop (SIL).

processor-in-the-loop (PIL) simulation – Development process that cross-compiles source code and runs the resulting object code on a target processor using hardware-specific data attributes and sample time attributes. Typical goals include object code verification by comparing processor-in-the-loop results with model simulation and software-in-the-loop (SIL) results.

hardware-in-the-loop (HIL) simulation – Development process that pairs physical components, such as the hardware and software for a controller, with a virtual real-time implementation of a physical component, such as a plant.

In the following example, code for the controller model is generated and downloaded to the production controller hardware. Code is generated for the plant model and downloaded to a real-time hardware computer (e.g. Simulink Realtime).

Test Harness

Simulink model that provides a framework for testing the simulation behavior and outputs of another model or model component. Objectives of the test harness are to automate the testing process, execute a test suite with multiple test cases, and analyze results.

In the following model, a Signal Editor block provides test signals while outputs are logged for analysis in the Scope block.