Supported Features for Embedded Targets
R2026bThe SoC Blockset™ Support Package for AMD FPGA and SoC Devices enables you to use the supported hardware with the following MathWorks® software capabilities:
Automated makefile-based building of software, downloading, and running on hardware (Build and Run Executable on AMD SoC Devices)
Multitasking code generation that uses POSIX® threads (Pthreads) for concurrent execution on ARM® cores running Linux® (Multicore Processor Targets (Simulink))
Tuning and monitoring executables running on the hardware from a Simulink® model (Host-Target Communication with External Mode Simulation)
Using Model (Simulink) block to reference other models (Model References (Simulink))
Processor-in-the-loop (PIL) simulation using model blocks and a TCP/IP connection (Create a Target Communication Channel for Processor-in-the-Loop (PIL) Simulation (Embedded Coder))
PIL-based execution profiling (Code Verification Through Software-in-the-Loop and Processor-in-the-Loop Execution (Embedded Coder))
UDP Send, UDP Receive blocks for communication, and a Linux Task block management
Code-replacement library for ARM Cortex-A9 processor (Optimize Code for ARM Cortex-A Processors (Embedded Coder))
Note
PIL simulation and PIL-based execution profiling require single-core execution.