Positive-Sequence (PLL-Driven)

(To be removed) Compute positive-sequence component of three-phase signal at fundamental frequency

The Specialized Power Systems library will be removed in R2026a. Use the Simscape™ Electrical™ blocks and functions instead. For more information on updating your models, see Upgrade Specialized Power System Models to use Simscape Electrical Blocks.

Library

Simscape / Electrical / Specialized Power Systems / Sensors and Measurements

Description

The Positive-Sequence (PLL-Driven) block computes the positive-sequence component (magnitude and phase) of the input 3 signal over a running window of one cycle of the fundamental frequency given by input 1. The reference frame required for the computation is given by the input 2. The first two inputs are normally connected to a PLL block.

The positive-sequence component of a three-phase signal (V₁ or current I₁) is computed as

$\begin{array}{l} V_{1} = \frac{1}{3} (V_{a} + a \cdot V_{b} + a^{2} \cdot V_{c}) \\ V_{a}, V_{b}, V_{c} = three voltage phasors at the fundamental frequency \\ a = e^{j 2 π / 3} = 1 ∠ 120 ° complex operator \end{array}$

A Fourier analysis over a sliding window of one cycle of the fundamental frequency (input 1) is first applied to the three input signals. The block evaluates the phasor values at the fundamental. Then the transformation is applied to obtain the positive sequence.

As the block uses a running average window to perform the Fourier analysis, one cycle of simulation must complete before the outputs give the correct magnitude and angle. For example, the block response to a step change of V₁ is a one-cycle ramp. For the first cycle of simulation, the output is held constant to the values specified by the initial input parameters.

Parameters

Initial frequency (Hz): Specify the frequency of the first cycle of simulation. Default is 60.
Minimum frequency (Hz): The minimum frequency value determines the buffer size of the Variable Time Delay block used inside the block to compute the phasors. Default is 45.
Initial input (positive component) [ Mag, Phase-relative-to-PLL (degrees) ]: Specify the initial positive-sequence magnitude and phase (relative to the PLL phase), in degrees, of the input signals. Default is [1, 0].
Sample time: Specify the sample time of the block, in seconds. Set to 0 to implement a continuous block. Default is 0.

Inputs and Outputs

Freq: Fundamental frequency (Hz) required by the computation. This input is normally connected to the Freq output of a PLL block.
wt: Angle of the reference frame (rad/s) required for the computation. This input is normally connected to the wt output of a PLL block.
abc: The vectorized signal of the three [a b c] sinusoidal signals. Typical input signals are voltages or currents measured by Current Measurement or Voltage Measurement blocks.
|u|Magnitude: Outputs the magnitude of the positive-sequence component in the same unit as the input signal.
$∠ u$ Phase: Outputs the phase of the positive-sequence component, in degrees, relative to the reference frame wt (input 2).

Characteristics

Sample Time	Specified in the Sample Time parameter Continuous if Sample Time = 0
Scalar Expansion	No
Dimensionalized	No

Version History

Introduced in R2013a