How to verify Altera IP core with Simulink?

How could I verify Altera IP core with Simulink? Or it can`t be done?

Answer 1

[Eric Cigan]

MathWorks offers a number of ways to verify Altera IP cores with Simulink depending on use case.

• If you have a reference model or specification in either MATLAB or Simulink, you may use a feature of our HDL Verifier product -- cosimulation with Mentor ModelSim/QuestaSim or Cadence Incisive -- to verify the IP core using a MATLAB or Simulink test bench.
• As a further option, if you have an Altera development board, you may use a feature of our HDL Verifier product -- FPGA-in-the-Loop -- to verify the IP core running on the board using a MATLAB or Simulink test bench.
• If you generated the IP core using HDL Coder, you may use a standalone HDL test bench that's automatically generated. That HDL test bench should work with practically any HDL simulator.

I recommend you visit the HDL Verifier page and check out some of the videos and webinars to learn more.

[Tien-Sang Nguyen]

Is there difference if we use Xilinx IP Core instead of Altera ones? Thanks so much.