Eric Cigan

Last seen: 2 giorni fa | Attivo dal 2014

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Zynq SDR setup error
Please note that starting with the 24a general release, the features of Zynq SDR Support from Communications Toolbox will be ava...

circa un anno fa | 0

Risposto
Lane Detection with Zynq-Based Hardware - Pixel-Stream Model
Please note that starting with the 24a general release, the features of the Xilinx Zynq Support from Vision HDL Toolbox will be ...

circa un anno fa | 0

Risposto
how to get hdmi input to the matlab?
Please note that starting with the 24a general release, the features of the Xilinx Zynq Support from Vision HDL Toolbox will be ...

circa un anno fa | 0

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HDL workflow Advisor image
Please note that starting with the 24a general release, the features of the Xilinx Zynq Support from Vision HDL Toolbox will be ...

circa un anno fa | 0

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Coverage in FPGA in the loop
Hi Ander— You raise a good question here in your pursuit of validating the coverage of your testbench. Our team reviewed this a...

circa 4 anni fa | 1

Risposto
is it possible to run the demo "Performing Large Matrix Operation on FPGA using External Memory" on Intel Altera FPGA?
Yes, it should be possible. If you are still interested, please write to me at eric.cigan at mathworks.com.

quasi 7 anni fa | 0

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Risposto
MATLAB and ModelSim, version compatibility
Here is a <https://www.mathworks.com/help/hdlverifier/gs/supported-eda-tools.html#bt16i4l-7 page that lists the versions of Mode...

oltre 7 anni fa | 0

| accettato

Risposto
Vivado build in Simualtor co-simulation
We maintain a <https://www.mathworks.com/help/hdlverifier/gs/supported-eda-tools.html complete list of HDL simulators> for which...

oltre 7 anni fa | 0

| accettato

Risposto
Can I get a list of Altera FPGA boards supported by matlab/simulink?
[was a comment - re-submitting as an answer] At this point the DE1-SoC is not supported out of the box. However, it should be p...

circa 8 anni fa | 0

Risposto
Compatibility for Mathworks' and Xilinx tools integration (System Generator, Vivado, Support Package...)
Please note that in HDL Coder R2014b, *both* Xilinx ISE and Vivado are supported as downstream tools. I understand that Yongfeng...

circa 10 anni fa | 0

Risposto
Usage of Sum of Elements blockset from Altera DSP builder advanced blockset
I recommend that you check with Altera on this question because they will have more direct experience with the capabilities and ...

circa 10 anni fa | 0

Risposto
Matlab Simulink with Altera Stratix III FPGA
Based on your explanation, I believe this would be supported by HDL Verifier, which supports FPGA-in-the-Loop with Stratix III b...

circa 10 anni fa | 0

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2014b and HDL Coder
No -- as you observed, AXI-Stream is not supported with HDL Coder in R2014b.

circa 10 anni fa | 0

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HDL verifier and zedboards
Architectural issues with Zynq have made it difficult to use the FIL feature of HDL Verifier with ZedBoard. In terms of other So...

circa 10 anni fa | 0

Risposto
How to verify Altera IP core with Simulink?
MathWorks offers a number of ways to verify Altera IP cores with Simulink depending on use case. * If you have a reference m...

circa 10 anni fa | 1