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Kiran Kintali
Kiran Kintali il 21 Gen 2011

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The increasing complexity of the complete System-on-Chip (SOC) designs and the strict Time-to-Market design constraints are the main drivers for the emergence of hardware Intellectual Property (IP) and IP re-use.
Design engineers are compelled to re-use existing design blocks (hardware code written in VHDL or Verilog for example) in creating extremely large and complex systems in the given short time.
Also, the perils of reinventing the wheel drives the designers to make re-usable blocks in the first place and then use them in their system designs incrementally over various product releases to the market.
Such re-usable blocks of HDL Code (IP) can either be taken from internal design libraries or be purchased from third party vendors.

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