Weird Port width mismatch error.

I got the sollowing error:

Port width mismatch. Input 'signal' expects a signal of size [1.3608e+06x1]. The signal received is of size [1360800x1].

However, 1.3608e+06 is exactly 1360800. How to dispose the error message?

[Paul]

Hi Lorant,

Assuming this is Simulink, can you post a screen shot of the relevant portion of the model that's causing the error and the full text of the error message that comes up in the diagnostics window? Overlay the signal dimensions on the diagram from Debug -> Information Overlays.

Also, I wonder if there is a maximum allowable dimension for a signal. I coudn't find that info in the documentation.

Answer 1

[Walter Roberson]

A = 1.3608e+06

A = 1360800

B = A+1

B = 1360801

fprintf('A = %.4e\n', A)

A = 1.3608e+06

fprintf('B = %.4e\n', B)

B = 1.3608e+06

A == B

ans = logical
   0

The two values both display as 1.3608e+06 but the values are not the same.

[Lóránt Farkas]

Ok, but how could I find out what numbers he expect? If I click on the error, then I see:

CompiledSize:[1360800, 1]

and the arrow that going in has also 1360800x1.

So what is the problem? Why do I get error, and how to get rid of it?

[Walter Roberson]

Does this happen to be for a MATLAB Function Block, or is the signal output of a MATLAB Function Block? And if so then is the size of the array being calculated in terms of an expression that involves either division or non-integer values ? For example 13608000*0.1 is not guaranteed to be exactly the integer 1360800