So this was a tough one to find, but I think I found the problem. I noticed that in the MW_c28xx_csl.c file that there was some discrepancy between the ECAP1 - ECAP3 isr's versus the ECAP4 - ECAP6 isr's. See the following code snippet below that was NOT working:
25 interrupt void ECAP1_INT_isr(void)
26 {
27 isr_int4pie1_task_fcn();
28 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
29 ECap1Regs.ECCLR.all = ECap1Regs.ECFLG.all;
30 }
31
32 interrupt void ECAP2_INT_isr(void)
33 {
34 isr_int4pie2_task_fcn();
35 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
36 ECap2Regs.ECCLR.all = ECap2Regs.ECFLG.all;
37 }
38
39 interrupt void ECAP3_INT_isr(void)
40 {
41 isr_int4pie3_task_fcn();
42 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
43 ECap3Regs.ECCLR.all = ECap3Regs.ECFLG.all;
44 }
45
46 interrupt void ECAP4_INT_isr(void)
47 {
48 isr_int4pie4_task_fcn();
49 EALLOW;
50 ECap4Regs.ECCLR.bit.INT = 1;
51 EDIS;
52 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
53 }
54
55 interrupt void ECAP5_INT_isr(void)
56 {
57 isr_int4pie5_task_fcn();
58 EALLOW;
59 ECap5Regs.ECCLR.bit.INT = 1;
60 EDIS;
61 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
62 }
63
64 interrupt void ECAP6_INT_isr(void)
65 {
66 isr_int4pie6_task_fcn();
67 EALLOW;
68 ECap6Regs.ECCLR.bit.INT = 1;
69 EDIS;
70 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
71 }
Note that ECAP4 to ECAP6 are different than ECAP1 to ECAP3... It appears that not all of the ECap#Regs.ECCLR register was cleared during the isr for ECAP4 to ECAP6. This confirms why the main loop of my program was hanging. There was an interrupt that was continually triggering (actually there were 3)!
I edited the ti_c2837xS_interrupts.tlc file to fix this code generation... here are my edits
OLD:
238 !(intnum==4 && (pienum==1 || pienum==2 || pienum==3)) && /% Don't clear for eCAP %/ \
305 %%Clear eCAP flag when use INT 4.1 to 4.3
306 %if intnum==4 && (pienum>=1 && pienum<=3)
NEW:
238 !(intnum==4 && (pienum==1 || pienum==2 || pienum==3 || pienum==4 || pienum==5 || pienum==6)) && /% Don't clear for eCAP %/ \
305 %%Clear eCAP flag when use INT 4.1 to 4.6
306 %if intnum==4 && (pienum>=1 && pienum<=6)
This ends up generating the correct MW_c28xx_csl.c file as seen below:
25 interrupt void ECAP1_INT_isr(void)
26 {
27 isr_int4pie1_task_fcn();
28 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
29 ECap1Regs.ECCLR.all = ECap1Regs.ECFLG.all;
30 }
31
32 interrupt void ECAP2_INT_isr(void)
33 {
34 isr_int4pie2_task_fcn();
35 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
36 ECap2Regs.ECCLR.all = ECap2Regs.ECFLG.all;
37 }
38
39 interrupt void ECAP3_INT_isr(void)
40 {
41 isr_int4pie3_task_fcn();
42 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
43 ECap3Regs.ECCLR.all = ECap3Regs.ECFLG.all;
44 }
45
46 interrupt void ECAP4_INT_isr(void)
47 {
48 isr_int4pie4_task_fcn();
49 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
50 ECap4Regs.ECCLR.all = ECap4Regs.ECFLG.all;
51 }
52
53 interrupt void ECAP5_INT_isr(void)
54 {
55 isr_int4pie5_task_fcn();
56 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
57 ECap5Regs.ECCLR.all = ECap5Regs.ECFLG.all;
58 }
59
60 interrupt void ECAP6_INT_isr(void)
61 {
62 isr_int4pie6_task_fcn();
63 PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;/* Acknowledge to receive more interrupts*/
64 ECap6Regs.ECCLR.all = ECap6Regs.ECFLG.all;
65 }
I have deployed this to hardware and have confirmed that this solved my problem.
