Perform mapping of 16 point ifft using cosimulation

Hi

I have successfully managed to satisfy all check points of "HDL workflow advisor" Now at mapping I am given Error as provided in snapshot that the resources are insufficient. The FPGA in use is spartan-3e with 500k gates and I think its sufficient for this task. Can any one help me in this matter?

Snapshot:

http://imageshack.us/photo/my-images/607/pblm.jpg/

Answer 1

[Rob Graessle]

"IOB" refers to the input/output pins on the FPGA. So the design you are implementing has too many inputs and outputs (or the widths of the I/O signals are too large) for your particular FPGA.