XILINXBRAM - Xilinx FPGA Block RAM Init

Versione 1.0.0.0 (18,7 KB) da Stepan Matejka
Matlab code for Xilinx FPGA (Spartan, Virtex) 18k block RAM declaration using VHDL or Verilog
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Aggiornato 12 feb 2010

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Use xilinxbram.m and xilinxbraminit.m functions to generate VHDL or Verilog fraction of code to initialize Xilinx FPGA (Spartan, Virtex) 18k block RAM.
Recent revision is also available here: http://radio.feld.cvut.cz/personal/matejka/wiki/doku.php?id=root:en:projects

Cita come

Stepan Matejka (2024). XILINXBRAM - Xilinx FPGA Block RAM Init (https://www.mathworks.com/matlabcentral/fileexchange/26654-xilinxbram-xilinx-fpga-block-ram-init), MATLAB Central File Exchange. Recuperato .

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Creato con R14
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Versione Pubblicato Note della release
1.0.0.0