FPGA Implementation of the Morphological gradient operation using HDL coder

Morphological Gradient operation has been implemented on gray scale image using HDL coder

In this submission a useful edge detection approach based on morphological operation called "morphological gradient" has been implemented using HDL coder.The design has been successfully simulated and synthesized using ModelSim and Xilinx ISE.This algorithm is based on subtraction of the eroded image from the diluted one and hence provides useful features which can be further used in the image processing applications.