SVPWM for three-phase three-level Inverter

The SVPWM technique is the most suitable one for deploying to DSP and microcontrollers since these devices have dedicated H/W resources

The SVPWM technique is the most suitable one for encoding onto DSP and microcontrollers since these devices have suitable dedicated H/W resources that can receive slow rate updates of the duty cycle (for example at 50 to 100 microseconds) and produce very fine PWM resolutions using their integrated capture compare H/W modules. The author of this contribution has previously contributed an algorithm that doesn't exploit the possibilities for suppressing the neutral point fluctuation. In the previous contribution, the suppression technique is limited to the swapping of redundant vectors. In this contribution, another suppression method is combined with the previous one. It is the manipulation of the time assigned for the zero-vector. This time is implemented by allocating it using the zero vector O111 in the middle of the pulses and O000 on both edges. The splitting of T0 between vectors O111 and O000 can be manipulated in favor of suppressing the neutral point voltage fluctuation since each vector has the same effect on the pole voltage but opposite effects on the neutral point voltage. To enable this manipulation, the SVPWM block needs to receive the NPV fluctuation signal and the three-phase currents. The derivation of pulse width control laws is given in zipped Excel files. The given SIMULINK model compare the performance of the same block with and without zero-vector manipulation. You can change the load power factor and the modulation index to see the impact on the NP voltage fluctuation