Upsample
Resample input at higher rate by inserting zeros
- Library:
DSP System Toolbox / Signal Operations
DSP System Toolbox HDL Support / Signal Operations
Description
The Upsample block resamples each channel of the Mi-by-N input at a rate L times higher than the input sample rate by inserting L-1 zeros between consecutive samples. Specify the integer L in the Upsample factor parameter. Use the Sample offset parameter D to delay the output samples by a specific number of sample periods. Doing so enables you to select any of the L possible output phases. The value you specify in the Sample offset parameter must be an integer in the range .
You can use this block inside triggered subsystems when you set the Rate
options parameter to Enforce single-rate
processing
.
Ports
Input
Port_1
— Input signal
scalar | vector | matrix
Specify the input signal as a real or a complex-valued scalar, vector, or a matrix signal.
When you set Input processing to
Columns as channels (frame based)
and
Rate options to Enforce
single-rate processing
, the input can be a
variable-size signal. That is, the frame size (number of rows) and the
number of channels (columns) of the signal can change during
simulation.
Data Types: single
| double
| int8
| int16
| int32
| uint8
| uint16
| uint32
| Boolean
| fixed point
Complex Number Support: Yes
Output
Port_1
— Upsampled signal
scalar | vector | matrix
The Upsample block outputs a signal that has the same data type and complexity as the input signal. The size of the output depends on the value of the Upsample factor, L parameter and the setting of the Rate options parameter.
If Upsample factor is set to L and Rate options is set to:
Enforce single-rate processing
–– The block maintains the input sample rate by increasing the output frame size by a factor of L.Allow multirate processing
–– The block resamples the signal such that the output sample rate is L times faster than the input sample rate. The output signal has the same frame size as the input signal.
When the input is a variable-size signal, the output is also a variable-size signal.
Data Types: single
| double
| int8
| int16
| int32
| uint8
| uint16
| uint32
| Boolean
| fixed point
Complex Number Support: Yes
Parameters
Upsample factor, L
— Upsample factor
3
(default) | positive integer
Specify the upsample factor L by which to increase the input sample rate as a positive integer.
Sample offset (0 to L-1)
— Sample offset
0
(default) | integer in the range [0, L−1]
Specify the sample offset D as an integer in the range [0, L−1].
Input processing
— Method to process input signals
Columns as channels (frame
based)
(default) | Elements as channels (sample based)
Specify how the block should process the input. You can set this parameter to one of these options:
Columns as channels (frame based)
— When you select this option, the block treats each column of the input as a separate channel. In this mode, the block can perform single-rate or multirate processing.Elements as channels (sample based)
— When you select this option, the block treats each element of the input as a separate channel. In this mode, the block always performs multirate processing.
Rate options
— Method by which block upsamples input
Enforce single-rate
processing
(default) | Allow multirate processing
Specify the method by which the block upsamples the input. You can select one of the following options:
Enforce single-rate processing
— When you select this option, the block maintains the input sample rate by increasing the output frame size by a factor of L. To select this option, you must set the Input processing parameter toColumns as channels (frame based)
.Allow multirate processing
— When you select this option, the block resamples the signal such that the output sample rate is L times faster than the input sample rate.
Initial conditions
— Initial conditions
0
(default) | scalar | vector | matrix
Specify the value with which the block is initialized for cases of nonzero latency as a scalar, vector, or a matrix. The scalar value appears in the output as the sample D+1. If this parameter is set to a vector or a matrix, the size of this parameter should be the same as that of the input. This parameter appears only when you configure the block to perform multirate processing.
Dependencies
To enable this parameter, set Rate options to
Allow multirate processing
.
Model Examples
Block Characteristics
Data Types |
|
Direct Feedthrough |
|
Multidimensional Signals |
|
Variable-Size Signals |
|
Zero-Crossing Detection |
|
More About
Frame-Based Processing
When you set the Input processing parameter to Columns as
channels (frame based)
, the block upsamples each column of the
input over time. In this mode, the block can perform either single-rate or multirate
processing. You can use the Rate options parameter to specify
how the block upsamples the input.
When you set the Rate options parameter to
Enforce single-rate processing
, the input and output of the block have the same sample rate. In this mode, the block outputs a signal with a proportionally larger frame size than the input. For upsampling by a factor of L, the output frame size is L times larger than the input frame size (Mo = Mi*L), but the input and output frame rates are equal.For an example of single-rate upsampling, see Upsample Signal In Single-Rate Processing Mode.
When you set the Rate options parameter to
Allow multirate processing
, the block treats an Mi-by-N matrix input as N independent channels. The block upsamples each column of the input over time by keeping the frame size constant (Mi=Mo), and making the output frame period (Tfo) L times shorter than the input frame period (Tfo = Tfi/L).See the Upsample Signal In Multirate Frame-Based Processing Mode example to see the Upsample block in this mode.
Sample-Based Processing
When you set the Input processing parameter to
Elements as channels (sample based)
, the block treats
an M-by-N matrix input as
M*N independent channels, and upsamples
each channel over time. In this mode, the block always performs multirate
processing. The output sample rate is L times higher than the
input sample rate (Tso =
Tsi/L), and the input and output sizes
are identical.
Zero Latency
The Upsample block has zero-tasking latency
for all single-rate operations. The block is in a single-rate mode if you set the
Upsample factor parameter to 1
or if you
set the Input processing parameter to Columns as
channels (frame based)
and the Rate options
parameter to Enforce single-rate processing
.
The Upsample block also has zero-tasking latency for multirate operations if you run your model in Simulink® single-tasking mode.
Zero-tasking latency means that the block propagates the first input (received at t=0) immediately after the consecutive zeros D, which you specify in the Sample offset parameter. This output (D+1) is followed in turn by the L-1 inserted zeros and the next input sample.
Nonzero Latency
The Upsample block has tasking latency for a multirate multitasking operation:
In multirate sample-based processing mode, the initial condition for each channel appears as output sample D+1, and is followed by L-1 inserted zeros. The channel's first input appears as output sample D+L+1. The Initial conditions parameter can be an Mi-by-N matrix containing one value for each channel, or a scalar value that the block applies to all signal channels.
In multirate frame-based processing mode, the first row of the initial condition matrix appears as output sample D+1, and is followed by L-1 inserted rows of zeros, the second row of the initial condition matrix, and so on. The first row of the first input matrix appears in the output as sample MiL+D+1. The Initial conditions parameter can be an Mi-by-N matrix, or a scalar value that the block repeats across all elements of the input matrix.
Note
For more information on latency and the Simulink tasking modes, see Excess Algorithmic Delay (Tasking Latency) and Time-Based Scheduling and Code Generation (Simulink Coder).
Extended Capabilities
C/C++ Code Generation
Generate C and C++ code using Simulink® Coder™.
Generated code relies on the memcpy
or
memset
function (string.h
) under certain
conditions.
HDL Code Generation
Generate Verilog and VHDL code for FPGA and ASIC designs using HDL Coder™.
HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.
Consider whether your model can use the Repeat block instead of the Upsample block. The Repeat block uses fewer hardware resources, so as a best practice use the Upsample block only when your algorithm requires zero-padding upsampling.
See also Multirate Model Requirements for HDL Code Generation (HDL Coder).
This block has one default HDL architecture.
ConstrainedOutputPipeline | Number of registers to place at
the outputs by moving existing delays within your design. Distributed
pipelining does not redistribute these registers. The default is
|
InputPipeline | Number of input pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is
|
OutputPipeline | Number of output pipeline stages
to insert in the generated code. Distributed pipelining and constrained
output pipelining can move these registers. The default is
|
Input processing set to Columns as channels
(frame based)
is not supported.
This block supports code generation for complex signals.
Fixed-Point Conversion
Design and simulate fixed-point systems using Fixed-Point Designer™.
Version History
Introduced before R2006aR2022b: Support for variable-size input signal
Starting in R2022b, when you set Input processing to
Columns as channels (frame based)
and Rate
options to Enforce single-rate processing
,
the input can be a variable-size signal. That is, the frame size (number of rows)
and the number of channels (columns) of the signal can change during
simulation.
When the input is a variable-size signal, the output is also a variable-size signal.
See Also
Downsample | FIR Interpolation | FIR Rate Conversion | Repeat
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