Visualize multiple signals of a programmable FIR filter by using a logic analyzer. For more information on the model used in this example and how to configure the model to generate HDL code, see Programmable FIR Filter for FPGA.
Open the example model.
modelname = 'dspprogfirhdl'; open_system(modelname);
Consider two FIR filters, one with a lowpass response and the other with a highpass response. The coefficients can be specified using the InitFcn* callback function. To specify the callback, select File > Model Properties > Model Properties. In the dialog box, in the Callbacks tab, select InitFcn*.
The Programmable FIR via Registers block loads the lowpass coefficients from the Host Behavioral Model block and processes the input chirp samples first. The block then loads the highpass coefficients and processes the same chirp samples again.
Open the Programmable FIR via Registers block.
systemname = [modelname '/Programmable FIR via Registers']; open_system(systemname);
Run the example model.
Open the scope.
Compare the DUT (Design under Test) output with the reference output.
The Logic Analyzer enables you to view multiple signals in one window. It also makes it easy to detect signal transitions.
The signals of interest (input coefficient, write address, write enable, write done, filter in, filter out, reference out, and error) have been marked for streaming in the model. Click the streaming button in the toolbar and select Logic Analyzer.
The Logic Analyzer displays waveforms of the selected signals.
In the Logic Analyzer, you can modify the height of all the displayed channels, and the spacing between the channels. Click the Settings button. Then, modify the default height and spacing for each wave. Click Apply to show the new dimensions in the background.
To zoom in on the waveform, click the Zoom In Time button in the ZOOM & PAN section of the toolbar. Your cursor becomes a magnifying glass. Then click and drag to select an area on the waveform.
The Logic Analyzer now displays the time span you selected.
You can also control the display on a per-waveform basis. To modify an individual waveform, double-click the signal, select the signal, then click the WAVE tab to modify its settings.
CoeffIn signal in signed decimal mode. The
conversion uses the fractional and integer bits as defined for this signal in your
Another useful mode of visualization in the Logic Analyzer is the analog format.
Filter Out, and
Ref Out signals in analog format.
You can also add dividers to the display. Click the Add Divider button in the toolbar.
Then specify a name for your divider on the DIVIDER tab. Add a second divider. A divider is added underneath the selected wave. If no wave is selected, it is added at the bottom of the display. To move the divider, click on the divider name and drag it to a new position. Alternatively, use the Move arrows on the DIVIDER tab.
Note the divider in its new position.
For more instructions on using the waveform display tool, see Logic Analyzer.