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dsphdl.FIRDecimator

Finite impulse response (FIR) decimation filter

Since R2020b

Description

The dsphdl.FIRDecimator System object™ implements a single-rate polyphase FIR decimation filter that is optimized for HDL code generation. The object provides a hardware-friendly interface with input and output control signals. To provide a cycle-accurate simulation of the generated HDL code, the object models architectural latency including pipeline registers and resource sharing.

The object accepts scalar or vector input. When you use vector input and the vector size is less than the decimation factor, the decimation factor must be an integer multiple of the vector size. In this case, the output is scalar and an output valid signal indicates which samples are valid after decimation. The output data is valid every DecimationFactor/VectorSize samples. The waveform shows an input vector of four samples and a decimation factor of eight. The output data is a scalar that is valid every second cycle.

When you use vector input and the vector size is greater than the decimation factor, the vector size must be an integer multiple of the decimation factor. In this case, the output is a vector of VectorSize/DecimationFactor samples. The waveform shows an input vector of eight samples and a decimation factor of four. The output data is a vector of two samples on every cycle.

The object provides two filter structures. The direct form systolic architecture provides an implementation that makes efficient use of Intel® and Xilinx® DSP blocks. This architecture can be fully parallel or serial. To use a serial architecture, the input samples must be spaced out with a regular number of invalid cycles between the valid samples. The direct form transposed architecture is a fully parallel implementation and is suitable for FPGA and ASIC applications. For a filter implementation that matches multipliers, pipeline registers, and pre-adders to the DSP configuration of your FPGA vendor, specify your target device when you generate HDL code.

All filter structures optimize hardware resources by sharing multipliers for symmetric or antisymmetric filters and by removing the multipliers for zero-valued coefficients such as in half-band filters and Hilbert transforms.

The object implements one filter for each sample in the input vector. The object then shares this filter between the polyphase subfilters by interleaving the subfilter coefficients in time.

To filter and decimate input data with an HDL-optimized algorithm:

  1. Create the dsphdl.FIRDecimator object and set its properties.

  2. Call the object with arguments, as if it were a function.

To learn more about how System objects work, see What Are System Objects?

Creation

Description

firDecim = dsphdl.FIRDecimator creates a default HDL-optimized FIR decimation filter System object.

firDecim = dsphdl.FIRDecimator(dec,num) sets the DecimationFactor property to dec and the Numerator property to num.

firDecim = dsphdl.FIRDecimator(___,Name=Value) sets properties using one or more name-value arguments. For example, FilterStructure='Direct form transposed' specifies the filter architecture as a fully parallel implementation that is suitable for FPGA and ASIC applications.

Properties

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Unless otherwise indicated, properties are nontunable, which means you cannot change their values after calling the object. Objects lock when you call them, and the release function unlocks them.

If a property is tunable, you can change its value at any time.

For more information on changing property values, see System Design in MATLAB Using System Objects.

Main

FIR filter coefficients, specified as a real- or complex-valued vector. You can specify the vector as a workspace variable or as a call to a filter design function. When the input data type is a floating-point type, the object casts the coefficients to the same data type as the input. When the input data type is an integer type or a fixed-point type, set the coefficient data type by using the CoefficientsDataType property.

Example: firpm(30,[0 0.1 0.2 0.5]*2,[1 1 0 0]) defines coefficients using a linear-phase filter design function.

Data Types: single | double | int8 | int16 | int32 | uint8 | uint16 | uint32

HDL filter architecture, specified as one of these structures:

  • 'Direct form systolic' — This architecture provides a fully parallel or partly serial filter implementation that makes efficient use of Intel and Xilinx DSP blocks. For a partly serial implementation, specify a value greater than 1 for the NumCycles property. You cannot use frame-based input with the partly serial architecture.

    When NumCycles is greater than 1, the object chooses a filter architecture that results in the fewest multipliers. If NumCycles allows for a single multiplier in each subfilter, then the object implements a single serial filter and decimates the output samples.

  • 'Direct form transposed' — This architecture is a fully parallel implementation that is suitable for FPGA and ASIC applications.

The object implements a polyphase decomposition filter by using dsphdl.FIRFilter objects. All implementations share resources by interleaving the subfilter coefficients over one filter implementation for each sample in the input vector.

For architecture details, see FIR Filter Architectures for FPGAs and ASICs.

Decimation factor, specified as integer greater than two. When you use vector input and the vector size is less than the decimation factor, the decimation factor must be an integer multiple of the vector size. When you use vector input and the vector size is greater than the decimation factor, the vector size must be an integer multiple of the decimation factor.

Serialization requirement for input timing, specified as a positive integer. This property represents N, the minimum number of cycles between valid input samples. To implement a fully serial architecture, set NumCycles to a value greater than the filter length, L, or to Inf.

The object applies coefficient optimizations before serialization, so the sharing factor of the final filter can be lower than the number of cycles that you specified.

Dependencies

To enable this property, set the FilterStructure property to 'Direct form systolic'.

You cannot use frame-based input with NumCycles greater than 1.

Data Types

Rounding method for type-casting the output, specified as 'Floor', 'Ceiling', 'Convergent', 'Nearest', 'Round', or 'Zero'. The object uses this property when casting the output to the data type specified by the OutputDataType property. When the input data type is floating point, the object ignores this property. For more details, see Rounding Modes.

Overflow handling for type-casting the output, specified as 'Wrap' or 'Saturate'. The object uses this property when casting the output to the data type specified by the OutputDataType property. When the input data type is floating point, the object ignores this property. For more details, see Overflow Handling.

Data type of filter coefficients, specified as 'Same word length as input' or a numerictype object. To specify a numerictype object, call numerictype(s,w,f), where:

  • s is 1 for signed and 0 for unsigned.

  • w is the word length in bits.

  • f is the number of fractional bits.

When the input is a fixed-point or integer type, the object casts the filter coefficients using the rule or data type in this property. The quantization rounds to the nearest representable value and saturates on overflow. When the input data type is floating point, the object ignores this property and all internal arithmetic uses the same data type as the input.

Data type of the filter output, specified as 'Same word length as input', 'Full precision', or a numerictype object. To specify a numerictype object, call numerictype(s,w,f), where:

  • s is 1 for signed and 0 for unsigned.

  • w is the word length in bits.

  • f is the number of fractional bits.

When the input is a fixed-point or integer type, the object casts the output of the filter using the rule or data type in this property. The quantization uses the settings of the RoundingMethod and OverflowAction properties. When the input data type is floating point, the object ignores this parameter and returns output in the same data type as the input.

The object increases the word length for full precision inside each filter tap and casts the final output to the specified type. The maximum final internal data type (WF) depends on the input data type (WI), the coefficient data type (WC), and the number of coefficients (L) and is given by

WF = WI + WC + ceil(log2(L)).

Because the coefficient values limit the potential growth, usually the actual full-precision internal word length is smaller than WF.

Control Arguments

Option to enable the reset input argument, specified as true or false. When you set this property to true, the object expects a value for the reset input argument. The reset signal implements a local synchronous reset of the data path registers.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Option to connect the data path registers to the generated HDL global reset signal, specified as true or false. Set this property to true to connect the generated HDL global reset signal to the data path registers. This property does not change the arguments of the object or modify simulation behavior in MATLAB®. When you set this property to false, the generated HDL global reset clears only the control path registers. The generated HDL global reset can be synchronous or asynchronous depending on your HDL code generation settings.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Usage

Description

[dataOut,validOut] = firDecim(dataIn,validIn) filters the input data only when validIn is true.

[dataOut,validOut] = firDecim(dataIn,validIn,reset) filters data when reset is false. When reset is true, the object resets the filter registers. The object expects the reset argument only when you set the ResetInputPort property to true.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Input Arguments

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Input data, specified as a real- or complex-valued scalar or vector. When you use vector input and the vector size is less than the decimation factor, the decimation factor must be an integer multiple of the vector size. When you use vector input and the vector size is greater than the decimation factor, the vector size must be an integer multiple of the decimation factor. The vector size must be less than or equal to 64.

When the input data type is an integer type or fixed-point type, the object uses fixed-point arithmetic for internal calculations.

The software supports double and single data types for simulation, but not for HDL code generation.

Data Types: fi | single | double | int8 | int16 | int32 | uint8 | uint16 | uint32
Complex Number Support: Yes

Control signal that indicates if the input data is valid. When validIn is 1 (true), the object captures the values from the dataIn argument. When validIn is 0 (false), the object ignores the values from the dataIn argument.

Data Types: logical

Control signal that clears internal states. When reset is 1 (true), the object stops the current calculation and clears internal states. When the reset is 0 (false) and the input valid is 1 (true), the block captures data for processing.

For more reset considerations, see the Reset Signal section on the Hardware Control Signals page.

Dependencies

To enable this argument, set the ResetInputPort property to true.

Data Types: logical

Output Arguments

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Filtered output data, returned as a real- or complex-valued scalar or column vector. When the input data is floating point, the output data inherits the data type of the input data. When the input data is an integer type or fixed-point type, the OutputDataType property specifies the output data type.

The output valid signal indicates which samples are valid after decimation. When the input vector size is greater than the decimation factor, the output is a vector of VectorSize/DecimationFactor samples.

Data Types: fi | single | double
Complex Number Support: Yes

Control signal that indicates if the output data is valid. When validOut is 1 (true), the object returns valid data from the dataOut argument. When validOut is 0 (false), values from the dataOut argument are not valid.

Data Types: logical

Object Functions

To use an object function, specify the System object as the first input argument. For example, to release system resources of a System object named obj, use this syntax:

release(obj)

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getLatencyLatency of FIR decimation filter
stepRun System object algorithm
releaseRelease resources and allow changes to System object property values and input characteristics
resetReset internal states of System object

Algorithms

This System object implements the algorithms described on the FIR Decimator block reference page.

Note

The output of the dsphdl.FIRDecimator object does not match the output from the dsp.FIRDecimation object sample-for-sample. This difference is mainly because of the phase that the samples are applied across the subfilters. To match the dsp.FIRDecimation object, apply DecimationFactor – 1 zeroes to the dsphdl.FIRDecimator object at the start of the data stream.

The dsp.FIRDecimation object also uses slightly different data types for full-precision calculations. The different data types can also introduce differences in output values if the values overflow the internal datatypes.

Extended Capabilities

Version History

Introduced in R2020b

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