Configure Reference Models

Step 3 of 4 in SoC-Based Multicore Modeling Workflow for Infineon AURIX Microcontrollers

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An SoC-based multicore model contains two or more reference models depending on the application requirement. To avoid build and validation errors while using the SoC Builder tool, verify the below configuration parameter settings of the reference models.

• The Processing Unit parameter value must be unique for each reference model.

• Set the Processing Unit parameter of any one of the reference models to TriCore0. TriCore^® 0 is the principal processing unit that handles system initialization, boot processes, and critical control tasks in the Infineon^® AURIX™ microcontrollers. If you design an application model to run on the processing units other than TriCore 0, then you must initialize these processing units by deploying an executable and linkable format (ELF) file of the TriCore 0 processing unit.

  For example, consider a TriCore 1 based application model:

  1. To initialize the TriCore 1 processing unit, you can use any TriCore 0 based model, such as the Simulink model shipped with the Getting Started with Multicore Modeling and Targeting for Infineon AURIX TC3x Microcontrollers example.

  2. In the Configuration parameter dialog box of this TriCore 0 based model, select Hardware implementation. Under Target hardware Resources, in the Device tab, select Enable TriCore1. Do not change any other settings of the model.

     

  3. Build the model and deploy the generated ELF file to your hardware board. This step initializes the TriCore 1 processing unit.

• The Hardware board, Device Series, Package class, Board, Enable program cache, Enable data cache parameters in all the reference models must match. To view and edit these parameters, go to Hardware Implementation pane in the Configuration Parameters dialog box.