Deployment

Deploy the generated HDL code onto target hardware

Deploying a plant model allows you to test your control algorithm. You can deploy your Simscape™ plant model for real-time simulation, including hardware-in-the-loop (HIL) simulation, using HDL code. HDL Coder™ can generate HDL code and optimize speed, area, and resource utilization by using HDL Workflow Advisor.

You can synthesize your generated HDL code by using an FPGA synthesis tool such as the Xilinx^® Vivado^® Design Suite. For more information about synthesis tools, see Third-Party Synthesis Tools and Version Support.

For deployment of your design to the Speedgoat^® FPGA I/O modules, see Simulink Real-Time FPGA I/O: Speedgoat Target Computer and Speedgoat Target Computers and I/O Hardware (Simulink Real-Time).

Topics

Generate HDL Code for Simscape Models
Generate HDL code from Simscape switched linear models.
Generate HDL Code for Simscape Models with Multiple Networks
Split a large Simscape network into multiple networks and generate HDL implementation model.
Generate Optimized HDL Implementation Model from Simscape
Optimize area and timing of HDL implementation model generated from Simscape by using HDL Coder optimizations.
Deploy Simscape Grid Tied Converter Model to Speedgoat IO Module Using HDL Workflow Script
Deploy grid tied converter modeled in Simscape to Speedgoat IO modules using HDL Workflow script.
Deploy Simscape DC Motor Model to Speedgoat FPGA IO Module
Generate an FPGA bitstream for a nonlinear Simscape model (DC motor) and deploy it onto a Speedgoat FPGA I/O module.
Generate FPGA Bitstream for Two-Phase DC-DC Converter with Tunable Run-Time Parameters
Generate FPGA bitstream for a Simscape model and tune the run-time parameter values.