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Define Custom Board and Reference Design for Microchip Pure FPGA Platforms

This example shows how to define and register a Pure FPGA boards and reference design for a LED blinking model in the IP Core Generation workflow of the HDL Workflow Advisor. You use a Microchip PolarFire® board, but you can define and register a custom board or a custom reference design for other Microchip platforms.

Requirements

To run this example, you need access to:

Set Up PolarFire Splash board

To familiarize yourself with the features of the PolarFire Splash kit, see the PolarFire Splash Kit Reference Manual. To set up your PolarFire Splash kit, follow these steps.

1. Install the USB COM port device drivers on your computer.

2. Connect the shared UART/JTAG USB port on the PolarFire Splash kit to your computer.

3. Download and install HDL Coder Support Package for Microchip and SoC devices. To access the hardware support package , in the Home tab of your MATLAB session, click Add-Ons and then click Get Hardware Support Packages.

4. Set up the Microchip Libero tool path by using the hdlsetuptoolpath function. For example, to set up the Microchip Libero SoC tool, specify ToolName as Microchip Libero SoC and ToolPath as your installed Libero executable path.

hdlsetuptoolpath('ToolName', 'Microchip Libero SoC', ...
    'ToolPath', 'C:\Microsemi\Libero_SoC_v2022.1\Designer\bin\libero.exe');

Create and Export Custom Reference Design by Using Microchip Libero SoC

A reference design captures the complete structure of an SoC design, defining the different components and their interconnections. Use the HDL Coder Reference Design workflow in the HDL Workflow Advisor to generate an IP core that integrates with the reference design and program FPGA board. This figure shows the relationship between a reference design, an HDL IP core, and FPGA board.

To create and export a reference design by using the Microchip Libero Tool environment, follow these steps.

1. Create an empty Microchip Libero project by using below settings for PolarFire family and Click Next. Click Finish to create a new Libero project.

2. Create new Smartdesign from Design Flow tab.

3. Add PF_OSC_CO, PF_CCC_C0, CORERESET_PF_C0 and PF_INIT_MONITOR_C0 IP's from IP Catalog to Libero_sd and make connections as shown below.

4. Export the completed block design as a Tcl script with the name design1_led.tcl.

The exported Tcl script (design1_led.tcl) constitutes the custom reference design. You use this reference design in the HDL Coder Reference Design workflow of the HDL Workflow Advisor to recreate the block design and integrate the generated HDL IP core with the block design in a Microchip Libero project.

Register PolarFire Splash Board in HDL Workflow Advisor

To register the PolarFire Splash Kit in the HDL Workflow Advisor, follow these steps.

1. Create a board registration file with the name hdlcoder_board_customization and add it to the MATLAB path.

A board registration file contains a list of board plugins. A board plugin is a MATLAB package folder containing a board definition file and all the reference design plugins associated with the board.

This code describes the contents of a board registration file that contains PolarFireRegistration board plugin to register the PolarFire Splash Kit in HDL Workflow Advisor. The function finds any registration file with the specified name on the MATLAB path and returns a cell array with the locations of the board plugins. The board plugin must be a package folder that is accessible from your MATLAB path containing a board definition file.

function r = hdlcoder_board_customization
% Board plugin registration file
r = { ...
      'PolarFireRegistration.plugin_board', ...
     };
end

2. Create the board definition file.

A board definition file contains information about the FPGA board.

Create a PolarFire Splash board definition file named plugin_board.m that resides inside the board plugin PolarFireRegistration.

For information about the FPGA I/O pin locations ('FPGAPin') and standards ('IOSTANDARD'), see the PolarFire Splash Kit constraints file from the Microchip website.

The property BoardName defines the name of the PolarFire board which will appear in the HDL Workflow Advisor.

function hB = plugin_board()
% Board definition
% Construct board object
hB = hdlcoder.Board;
hB.BoardName    = 'Microchip PolarFire Splash Kit (ES)';
% FPGA device information
hB.FPGAVendor   = 'Microchip';
hB.FPGAFamily   = 'PolarFire';
hB.FPGADevice   = 'MPF300TS_ES';
hB.FPGAPackage  = 'FCG484';
hB.FPGASpeed    = '-1';
% Tool information
hB.SupportedTool = {'Microchip Libero SoC'};
% FPGA JTAG chain position
hB.JTAGChainPosition = 2;
% Add interfaces
% Standard "External Port" interface
hB.addExternalPortInterface( ...
   'IOPadConstraint', {'IOSTANDARD = LVCMOS33'});
% Custom board external I/O interface
hB.addExternalIOInterface( ...
   'InterfaceID',    'LEDs General Purpose', ...
   'InterfaceType',  'OUT', ...
   'PortName',       'LEDs', ...
   'PortWidth',      8, ...
   'FPGAPin',        {'P7', 'P8', 'N7', 'N8', 'N6', 'N5', 'M8', 'M9'}, ...
   'IOPadConstraint', {'IOSTANDARD = LVCMOS33'});
hB.addExternalIOInterface( ...
   'InterfaceID',    'Push Buttons', ...
   'InterfaceType',  'IN', ...
   'PortName',       'PushButtons', ...
   'PortWidth',      4, ...
   'FPGAPin',        {'L6', 'M7', 'K5', 'K4'}, ...
   'IOPadConstraint', {'IOSTANDARD = LVCMOS33'});
hB.addExternalIOInterface( ...
  'InterfaceID',    'Slide switches ', ...
  'InterfaceType',  'IN', ...
  'PortName',       'SlideSwitches', ...
  'PortWidth',      4, ...
  'FPGAPin',        {'L3', 'M4', 'J6', 'K6'}, ...
  'IOPadConstraint', {'IOSTANDARD = LVCMOS25'});

Register Custom Reference Design in HDL Workflow Advisor

To register the custom reference design in HDL Workflow Advisor, follow these steps.

1. Create a reference design registration file named hdlcoder_ref_design_customization.m containing a list of reference design plugins associated with an SoC board.

A reference design plugin is a MATLAB package folder containing the reference design definition file and all the files associated with the FPGA design project. A reference design registration file must also contain the name of the associated board.

This code describes the contents of a PolarFire Splash reference design registration file containing the reference design plugin PolarFireRegistration.Libero_12_6 associated with the Microchip PolarFire Splash Kit (ES) board. The registration file finds files with the specified name inside a board plugin folder or on the MATLAB path. The function returns a cell array containing the locations of the reference design plugins and a character vector containing the associated board name. The reference design plugin must be a package folder that is accessible from the MATLAB path and must contain a reference design definition file.

function [rd,boardName] = hdlcoder_ref_design_customization
% Reference design plugin registration file
rd = {'PolarFireRegistration.Libero_12_6.plugin_rd', ...
     };
boardName = 'Microchip PolarFire Splash Kit (ES)';
end

2. Create the reference design definition file.

A reference design definition file defines the interfaces between the custom reference design and the HDL IP core that you generate.

Create a PolarFire reference design definition file plugin_rd.m to associate with the Microchip PolarFire Splash Kit (ES) board that resides inside the reference design plugin PolarFireRegistration.Libero_12_6. The ReferenceDesignName property defines the name of the reference design as Default system in HDL Workflow Advisor.

function hRD = plugin_rd()
% Reference design definition
% Construct reference design object
hRD = hdlcoder.ReferenceDesign('SynthesisTool', 'Microchip Libero SoC');
hRD.ReferenceDesignName = 'Default system';
hRD.BoardName = 'Microchip PolarFire Splash Kit (ES)';
% Tool information
hRD.SupportedToolVersion = {'12.0','12.6','2022.1'};
% Add custom design files
% add custom Libero  design
hRD.addCustomLiberoDesign( ...
   'CustomBlockDesignTcl', 'design1_led.tcl');
% Add interfaces
% add clock interface
hRD.addClockInterface( ...
    'ClockConnection',     'PF_CCC_C0_0/OUT0_FABCLK_0', ...
    'ResetConnection',     'CORERESET_PF_C0_0/FABRIC_RESET_N',...
    'DefaultFrequencyMHz', 50,...
    'MinFrequencyMHz',     5,...
    'MaxFrequencyMHz',     500,...
    'ClockModuleInstance', 'PF_CCC_C0_0',...
    'ClockModuleComponent','PF_CCC_C0',...
    'ClockNumber',         1);
% disable 'Generate Software Interface Model' task
hRD.HasProcessingSystem = false;

A reference design plugin must also contain the FPGA design project files.

The PolarFire reference design plugin folder PolarFireRegistration.Libero_12_6 must contain the Tcl script design1_led.tcl exported from the Microchip Libero project. The PolarFire reference design definition file plugin_rd.m identifies the FPGA design project file by using the addCustomLiberoDesign function.

hRD.addCustomLiberoDesign('CustomBlockDesignTcl', 'design1_led.tcl');

The reference design definition file plugin_rd.m also defines the interface connections between the custom reference design and the HDL IP core by using the addClockInterface function:

hRD.addClockInterface( ...
   'ClockConnection',     'PF_CCC_C0_0/OUT0_FABCLK_0', ...
   'ResetConnection',     'CORERESET_PF_C0_0/FABRIC_RESET_N',...

Generate HDL IP core for PolarFire Splash Kit

Use the custom board and reference design registration system to generate an HDL IP core that blinks LEDs on the PolarFire Splash Kit.

1. Add the PolarFire board registration files to the MATLAB path using these commands.

  hdlcoder_microchip_examples_root;
  addpath(fullfile(hdlcoder_microchip_examples_root,'PolarFire'));

2. Open the Simulink LED blinking model.

open_system('hdlcoder_led_blinking');

3. Launch the HDL Workflow Advisor from the hdlcoder_led_blinking/led_counter subsystem by right-clicking the led_counter subsystem, and hovering over HDL Code, and then clicking HDL Workflow Advisor. Alternatively, click the Launch HDL Workflow Advisor box in the model.

In the Set Target > Set Target Device and Synthesis Tool task, set Target workflow to IP Core Generation. In the Target Platform dropdown menu, select Microchip PolarFire Splash Kit (ES).

5. Click Run This Task to complete the Set Target Device and Synthesis Tool task.

6. In the Set Target > Set Target Reference Design task, set the Reference design field to Default system and click Run This Task.

7. In the Set Target Interface task, set the Target Platform Interface options and click Run This Task.

8. In the Set Target Frequency task, set Target Frequency to 50 MHz.

9. To generate the IP core and view the IP core generation report, right-click Generate RTL Code and IP Core and select Run to Selected Task. After you generate the custom IP core, the IP core files are in the ipcore folder within your project folder. An HTML custom IP core report is generated with the custom IP core. The report describes the behavior and contents of the generated custom IP core.

10. To integrate the IP core into the reference design and create the Libero project, follow step 1 of the Integrate IP Core with Microsemi Libero SoC Environment section in Integrate HDL IP Core with Microchip PolarFire SoC Icicle Kit Reference Design.

11. After completing the Create Project task under Embedded System Integration, examine the Microchip Libero SoC project. This figure shows the block design of the FPGA project when you highlight the HDL IP Core. Compare this block design with the previous block design used to export the custom reference design for a deeper understanding of the relationship between a custom reference design and an HDL IP Core.

12. Follow steps 2 and 3 of the Integrate IP Core with Microsemi Libero SoC Environment section of Integrate HDL IP Core with Microchip PolarFire SoC Icicle Kit Reference Design to generate the FPGA bitstream and program the target device, respectively.

13. After you load the bitstream, the LEDs on the PolarFire Splash Kit start blinking. You can change the direction of LED blinking by pressing Push Buttons[0].

See Also