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Speedgoat FPGA Support with HDL Workflow Advisor

Use Simulink® Real-Time™ and HDL Coder™ to implement Simulink algorithms and configure I/O functionality on Speedgoat® Simulink-Programmable I/O modules. For an example that shows the development workflow for FPGA I/O modules, see FPGA Programming and Configuration on Speedgoat Simulink-Programmable I/O Modules.

When you open the HDL Workflow Advisor in HDL Coder and run the Simulink Real-Time FPGA I/O workflow, you generate a Simulink Real-Time interface subsystem. The subsystem mask controls the block parameters. Do not edit the parameters directly. The FPGA I/O board block descriptions are for informational purposes only.

Speedgoat Simulink-Programmable I/O Module Support

Speedgoat Simulink-Programmable I/O modules are part of Speedgoat target computer systems. To run the Simulink Real-Time FPGA I/O workflow, install the Speedgoat I/O Blockset and the Speedgoat HDL Coder Integration Packages. You can then choose the Target platform and run the workflow to generate a Simulink Real-Time interface subsystem. To see the documentation for the integration packages, enter this command at the MATLAB® command prompt.


To learn aboutSee links

The integration packages and how you can install them.

See Speedgoat - HDL Coder Integration Packages.

Speedgoat I/O modules that are supported with the HDL Workflow Advisor.

See Speedgoat Real-Time FPGA Application Support from HDL Coder.

Applications and use cases

See Common Use Cases and Applications.

Supported interfaces for various types of I/O connectivity and protocols as well as fundamental functionality such as PCIe read/write and DMA.

See Supported Interfaces.

Provided examples for all supported I/O modules and functionality

See Speedgoat I/O Examples.

Prepare for FPGA Workflow

To work with FPGAs in the Simulink Real-Time environment, install:

You can use the workflow in HDL Coder to generate HDL code for your FPGA target device.

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