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Problems getting Master Transfer Block to function

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I would welcome a pointer to some clearer documentation for the c28x SPI Master Transfer block in provided for TI MCU for use in Simulink.
The description implies that after a WREN has been transmitted, an opcode byte of WRITE can then be followed by a 3 byte address and then as much data as is to be written. The data in bytes, but communicated as an array of 16 bit blocks in Simulink.
The documentation states "
Register address — SPI register address
0 (default) | positive integer scalar | positive integer vector
The slave register address from which the block reads data.
The positive integer vector is specified as, [2 0 32] for Write Data to Memory and [3 0 32] for Read Data from Memory. For more information, refer to the example Using SPI to Read and Write Data to SPI EEPROM.
I can deduce that the "2" equates to the WRITE command, but as to the 0 and 32 there is no extra information given in the example mentioned.
The fairly trivial task is to write a variable "n" bytes to an chosen address "x" on an NVRAM chip and then read "n" bytes back at a later stage, but hooking up the block in Simulink is not proving simple.
I have tried to set up the read, but get complation errors, unless I place a selector block in the path to strip out the initial data bytes (It isn't clear whether the "read command and address bytes" are part of the returned stream.
I asked this first on the TI forum, and the response was to contact Mathworks.

Risposta accettata

Ayush Gupta
Ayush Gupta il 16 Ott 2023
Here the address is split as 0x00 (0) and 0x20 (32) as two 8-bit numbers and is entered in the register address. The reason for splitting it as two 8-bit numbers is the setting in Data bits parameter in Advanced tab. Since this is set to 8 bits, the data in the vector format should not be considered more than 8-bit. If you select the parameter as 16, then 0 and 32 corresponds to 32-bit address (0x00000020) instead of 16-bit.
Hope it helps!
Thank you,
Ayush Gupta

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