why do i get this error?

why am i getting this error while changing matlab code to hdl code

Answer 1

[Kiran Kintali]

Can you share the design, testbench and the project files?

It looks like you are running into some issue with classes during floating point to fixed point conversion.

[PARVATHY NAIR]

i would like to convert the adaptive filter matlab code to verilog

i have attached the input data (which is acceleration details of seismic waves ) i have those data in .dat format as i cannot attach files in .dat format i have atttached the same in .csv format

[PARVATHY NAIR]

thankyou @Kiran Kintali for responding to my query

Answer 2

[Kiran Kintali]

Please attach files that can run without error. I got an error running the runtrial.m file.

You need break the design that needs to be on the FPGA in a seperate file. There is plotting and figure window related code in ada.m that needs to move into the testbench.

[PARVATHY NAIR]

@Kiran Kintali thankyou

what is the error ?could you please tell me cause i find no error while running the same.and also kindly look into the file name .

i have used the command filter(sys_desired,1,x) in .ada file.is it because that command i couldnt convert it to hdl?

[Kiran Kintali]

This file is missing BKHL.HHE.new.dat in your attachments.

Changing this to the attached csv file name leads to other errors.

>> runtrial
Unable to perform assignment because the size of the
left side is 1-by-1 and the size of the right side is
1-by-6039.

Error in ada (line 76)
    err_VSS(itr,:) = error.^2;

Error in runtrial (line 4)
[model_coeff_vss]=ada(z,mu_min);