Outport block requires an explicit signal buffer to ensure correct initialization of subsystem output port 1

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I need help with a problem I am having when I'm compiling my code.
I just have some signals that eventually go into a bus.
When I modify the block by adding a simple switch (copied and pasted from the existing one) I get the error shown below.
This is the error in case it is too difficult to read it from the picture: "Outport block 'CAN Receive 10ms/BusOut' requires an explicit signal buffer to ensure correct initialization of subsystem 'CAN Receive 10ms' output port 1. However, Simulink will not be able to associate a non-auto storage class from the source block 'CAN Receive 10ms/CAN MABx Receive 10ms/Subsystem/Switch5' output port 1 with such a buffer. One or more of the following reasons necessitates the buffer: (1) Outport is driven by a block with non-overwritable output such as a Ground, Constant, or a Stateflow block; (2) Outport is connected to an input of a Merge block; or (3) Outport shares the same signal source with another Outport nested within the current subsystem but having an explicit initial output value of its own; or (4) Outport shares the same signal source with another Outport in the same subsystem having an explicit initial output value of its own. For any of these reasons, consider inserting a Signal Conversion block before the Outport block and moving the storage class specification to the output of this inserted block. Alternatively, for reason (4), consider modifying the model to pass the signal with non-auto storage class through a separate Outport."
I also thought it was related to the recorded signal, but as shown in the next image everything works fine.
One workaround is to add a signal conversion to ALL signals (just adding it to the new part of the code doesn't work as well), but I would like to know why this happens.
Thank you in advance for your help.

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Prodotti


Release

R2022b

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