Purpose of software loopback in IO334_ad_da_hdlc.slx Model for Speedgoat IO334 Analog Interface.

I am using Speedgoat Performance P3 with IO334.

I have found an example demonstrating the use of Analog Interface (IO334_ad_da_hdlc.slx).

I have managed to generate HDL code and succesfully ran the model on Speedgoat. In this particular model the sine signals are supposed to be generated on the FPGA (there is internal sine generator inside DUT), send to AO channels and then routed by external wiring back to the AI channels.

However, I dont understand what kind of use is to loopback "data" and "trigger" label in IO334_ad_da_hdlc.slx. Input ports (AD_xx, AD_valid_X_X) and output ports (DA_xx, AD_Trigger_X_X) are mapped to the respective AI and AO interfaces via HDL advisor and external wiring connects signals from AOs to AIs. Can you clarify what is the purpose of this software loopback in the model?

Answer 1

[Dimitri MANKOV]

Hi Klemen,

The software loopback you mention here is a "remnant" coming from the source model. Before running the HDL Workflow Advisor, you have to define in/outports in the FPGA subsystem in order to be able to map these signals to physical interfaces in step 1.3 of the HDL Workflow Advisor. Since these ports inevitably generate signals in the layer above this sybsystem, a software loopback is modelled in this example to simulate the behavior expected in real-life (when the signals will be carried over the cable from the DAC to the ADC in a real loopback) and to validate the FPGA logic design directly in Simulink.

After the FPGA logic is translated into a configuration file (bitstream) by the HDL Workflow Advisor, these ports are not cleaned up automatically in the generated model. If you deploy this model on the hardware, these signals will most likely stay at zero (you can explore what they are mapped to in the generated model by going under the mask of the FPGA subsystem). You can cleanup all blocks and connections from terminated input ports and from grounded output ports using the function "speedgoat.hdlc.cleanGeneratedModel", more information about it here:

https://www.speedgoat.com/help/hdlcoder/page/refentry_sgapi_hdlc_clean_generated_model

I hope this is helpful!

Dimitri

[Klemen D]

I was not aware of the cleanup function "speedgoat.hdlc.cleanGeneratedModel", it seems really useful in clarifying actual implementation. Here is the cleaned-up block diagram.