Deep Learning HDL Toolbox with CycloneV SoC board

Hello,

I previously used the Deep Learning HDL Toolbox on an Intel Arria 10 SoC board, and now I would like to use it with a DE10-Nano SoC board. I noticed that the credentials for the provided prebuilt Linux system for the Arria 10 were user "root" and password "cyclonevsoc", which makes me think that a similar prebuilt image might exist for the Cyclone V SoC as well — even if it’s an older version. Is such an image available?

In this thread https://es.mathworks.com/matlabcentral/answers/1923140-deep-learning-hdl-toolbox-hdl-generation#answer_1564845?s_tid=prof_contriblnk it was suggested to follow the Deep Learning Processor IP Core Generation for Custom Board tutorial. In that example, a custom board is created for the Xilinx Kintex-Ultrascale KCU105 evaluation board.

However, I don’t see an option for the Cyclone V SoC. The only available alternative seems to be setting the TargetPlatform to Generic Deep Learning Processor, but I'm unsure how to define the specific Cyclone V SoC parameters. Am I missing a step?

I’ve created a custom board definition with the necessary files and added the 'boards' folder to the MATLAB path, but I’m still not sure how to proceed to target the DE10-Nano properly:

└── boards  
    └── +DE10Nano
    ├── +dl_soc_reference
    │   └── plugin_rd.m
    ├── hdlcoder_board_customization.m
    ├── hdlcoder_ref_design_customization.m
    └── plugin_board.m

Any guidance would be appreciated.

Answer 1

[Kiran Kintali]

Can you consider using the example and extend to DE-10 Nao Kit?

https://www.mathworks.com/help/hdlcoder/ug/define-and-register-custom-board-and-reference-design-for-intel-soc-workflow.html

>> web(fullfile(docroot, 'hdlcoder/ug/define-and-register-custom-board-and-reference-design-for-intel-soc-workflow.html'))

This example shows how to define and register a custom board and reference design in the HDL Coder™ Intel SoC workflow.

Introduction

Using this example, you will be able to register the Terasic DE1-SoC development kit and a custom reference design in the HDL Workflow Advisor for the Intel SoC workflow.

This example uses Terasic DE-1 SoC, but in the same way, you can define and register a custom board or a custom reference design for other Intel SoC devices.

If you have already followed all the instructions but running into issues please try reach out to tech support for additional help. Thanks.