To ensure consistent initialization of conditionally executed subsystem output ports in the block diagram 'IR_Circuit_final', you must enable strict bus modeling by setting both of the options 'Mux blocks used to create bus signals' and 'Bus signal t

This is the model error in simulink that appeared everytime i run a model circuit or transfer function. What is the solution for this problem?

[Belal Essam]

Dear Chadi,

You should open the "Model Configuration Parameters" (simply hit the button that holds the grey gear), at the left you'll find the "Diagnostics" entry, expand the arrow beside it to explore the elements under this category. After that, choose the "Connectivity" entry, and then at the right you'll find the options "Mux blocks used to create bus signals", and "Bus signal treated as vector", you should change the attached option with these two elements to be "error", instead of "none".

That's it.

Good Luck.