How to design 9-bit UP/DN counter in simulink ?

Hi, I want to design 9-bit UP/DN counter in simulink by using DFF. so that when input signal is logic '1' the counter count UP(9-bit) otherwise count Down (9-bit).

Say the UP/DN counter is 9b, and its previous state is 110110101, then a UP count would result in 110110110 or the DN count would result in 110110100.

could anyone please help me how to design that kind of UP/DN counter in simulink by using DFF ?

Thanks