Incremental Delta-sigma ADC Matlab Models

Versione 1.0.1 (1,51 MB) da Po Wong
Generic incremental delta-sigma modulator models (1st order, 2nd order, 3rd order) to simulate different kinds of digital filters.
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Aggiornato 17 giu 2022

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The file contains different code as per the name of the file to simulate incremental delta-sigma ADCs. Moreover, the performance of different filters can be simulated easily with the attached matlab code. More information about the decoders mentioned in the code can be found in:
B. Wang, M. -K. Law, S. B. Belhaouari and A. Bermak, "Near-Optimal Decoding of Incremental Delta-Sigma ADC Output," IEEE Trans. Circuits Syst. I, vol. 67, no. 11, pp. 3670-3680, Nov. 2020.

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B. Wang, M. -K. Law, S. B. Belhaouari and A. Bermak, "Near-Optimal Decoding of Incremental Delta-Sigma ADC Output," IEEE Trans. Circuits Syst. I, vol. 67, no. 11, pp. 3670-3680, Nov. 2020.

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Creato con R2018a
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Versione Pubblicato Note della release
1.0.1

The related paper file is included in this upload.
1.0.0