Exploring Design Verifier

Versione 1.2.0.0 (391 KB) da Natasha Jeppu
A set of Simulink blocks to explore Design Verifier in Flight Controls
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Aggiornato 25 giu 2015

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This is a collection of Simulink models which can be used to explore Simulink Design Verifier. The blocks are commonly used in flight control laws. The verification utilities of SDV prove the correctness of implementation. The requirements for the blocks is given as a PDF file. Some of the blocks have mutations introduced to show the working of SDV.

Cita come

Natasha Jeppu (2025). Exploring Design Verifier (https://it.mathworks.com/matlabcentral/fileexchange/48858-exploring-design-verifier), MATLAB Central File Exchange. Recuperato .

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Creato con R2014b
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Versione Pubblicato Note della release
1.2.0.0

I have added a Transient Free Switch block for the SDV. Please refer to http://www.mathworks.com/matlabcentral/fileexchange/39047-testing-of-safety-critical-control-systems for details of TFS block.
There was an error in the priority circuit. This has been corrected. A mutant file for Priority is included which shows how SDV works in bringing out the error.
1.1.0.0

Added a picture.
1.0.0.0