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Mohammed Shameem Hussain


Attivo dal 2016

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nnstart pattern reorganization : How to avoide removeconstantrows block use by the tool ?
Hi, I am a working pattern recognization tool from Matlab, where after running the tool I get removeconstantrows block in th...

oltre 7 anni fa | 1 risposta | 0

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Domanda


how to optimize resource usage in HDL coder ?
hi, I build a model and have a very high usage of the resource. I would like to decrease it, please suggest me what steps ca...

oltre 7 anni fa | 1 risposta | 0

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Domanda


Why there is no sample time setting for HDL counter block ?
Hi, I have done an implementation in sample down module, where I use HDL counter. But, the sample time in this block is canno...

oltre 7 anni fa | 2 risposte | 0

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Domanda


Assertion failed: b:\matlab\src\cgir_hdl\pir_transforms\datarateanalyzer.cpp:582:PirUtils::floatEqual(data.getRate(), outputSig->getRate())
I am trying to convert my HDL coder project to verilog files via HDL coder workflow. This error HDL code generation report. ...

oltre 7 anni fa | 2 risposte | 0

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Domanda


Native floating point setting in HDL coder simulink
Hello, From some tutorial I came to know that if I set Native floating point setting in Simulink then Matlab will take care c...

oltre 7 anni fa | 1 risposta | 0

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Domanda


HDL coder: Display video output by controlling with switch
Hello, I have made a Simulink model with HDL Coder blocks. The input to the model is video and output is also a video. Dur...

oltre 7 anni fa | 1 risposta | 0

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Domanda


[Simulink] How to set array in mask and assign first index value to a block
Hello, I would like to set an array in the mask parameter and access the values by index. For example in mask the parameter ...

oltre 7 anni fa | 1 risposta | 0

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Domanda


HDL coder simulation for video processing takes very long time. Is there way to do it faster ?
I have discrete-time settings with fixed step of 1. The frame size of video input 480 x 640.

oltre 7 anni fa | 1 risposta | 0

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Domanda


hdl coder dual port ram
Hi, I am facing asertion error in dual port RAM, as I want to write the into PORTA and read from PORTB. But there is not rea...

oltre 8 anni fa | 1 risposta | 1

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Domanda


RAM-based shift register in HDL coder
hi, I am looking for logic to implement RAM-based shift register. Looking forward a suggestion, it will be very help ful. ...

oltre 8 anni fa | 1 risposta | 0

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Domanda


HDL coder : does it handle SDRM, SSRAM and Flash
Hi, I would like to know how can I handle SDRAM, SSRAM , SDCARD interface and FLash in hdl coder. thank you

oltre 8 anni fa | 0 risposte | 0

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Domanda


How to wire the system clock signal to a PIN HDL coder (VGA_CLK need 25MHz signal )
Hi, I am looking for a solution to connect the signal from clock output generated by PLL (system clock in hdl coder) to the ...

oltre 8 anni fa | 0 risposte | 0

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Domanda


How can we set tri-state mode for unused pins in hdl coder for fpga while generating stand alone ?
Hello, In quartus there is an option to set all unused pins as tri-state mode. How can we set this option in hdl coder while...

oltre 8 anni fa | 0 risposte | 0

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Domanda


Regarding stand alone code generation from HDL coder
After running the hdl coder for standalone while generating project I am getting strange error. May I know what does it mean. th...

oltre 8 anni fa | 1 risposta | 0

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Domanda


HDL coder stand alone programming with verilog code file
My objective is to use hdl coder for standalone fpga programming (rapid prototyping with matlab). But I have some code in Verilo...

oltre 8 anni fa | 1 risposta | 0

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Domanda


regarding problem while generating vhdl code from simulink
Hello, I have generated simulink blocks from verilog files by using "cosimWizard". Now after connection I am trying to gener...

oltre 8 anni fa | 1 risposta | 0

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