Generate Target-Independent HDL Code with Native Floating-Point
HDL Coder™ native floating-point technology can generate target-independent HDL code from your floating-point design. You can synthesize your floating-point design on any generic FPGA or ASIC. Floating-point designs have better precision, higher dynamic range, and a shorter development cycle than fixed-point designs. If your design has complex math and trigonometric operations, use native floating-point technology.
How HDL Coder Generates Target-Independent HDL Code
This figure shows how HDL Coder generates code with the native floating-point technology.
The Unpack
and Pack
blocks convert the
floating-point types to the sign, exponent, and mantissa. In the figure,
S, E, and M represent the sign,
exponent, and mantissa respectively. This interpretation is based on the IEEE-754 standard
of floating-point arithmetic.
The Floating-Point Algorithm Implementation block performs computations on the S, E, and M. With this conversion, the generated HDL code is target-independent. You can deploy the design on any generic FPGA or an ASIC.
Enable Native Floating Point and Generate Code
You can enable native floating point and generate HDL code from a Simulink® model or MATLAB® function.
Specify Native Floating Point for a Simulink Model
You can specify the native floating-point settings for HDL code generation in the Configuration Parameters dialog box or at the command line.
To specify the native floating-point settings and generate HDL code in the Configuration Parameters dialog box:
In the Apps tab, select HDL Coder. The HDL Code tab appears.
Click Settings. In the HDL Code Generation > Floating Point pane, select Use Floating Point.
Specify the Latency Strategy to map your design to maximum or minimum latency or no latency. See Latency Strategy.
If you have denormal numbers in your design, select Handle Denormals. Denormal numbers are numbers that have an exponent field equal to zero and a nonzero mantissa field. See Handle Denormals.
If your design has multipliers, to specify how you want HDL Coder to implement the multiplication operation, use the Mantissa Multiplier Strategy. See Mantissa Multiplier Strategy.
To share floating-point resources, on the HDL Code Generation > Optimizations > Resource Sharing tab, make sure that you select Floating-point IPs. The number of blocks that get shared depends on the SharingFactor that you specify for the subsystem.
Click Apply. In the HDL Code tab, click Generate HDL Code.
To apply native floating point at the command line for HDL code generation, use the
hdlcoder.createFloatingPointTargetConfig
function. You can use this
function to create an hdlcoder.FloatingPointTargetConfig
object for the
native floating-point
library.
nfpconfig = hdlcoder.createFloatingPointTargetConfig('NATIVEFLOATINGPOINT'); hdlset_param('sfir_single', 'FloatingPointTargetConfiguration', nfpconfig);
Optionally, you can specify the latency strategy and whether you want HDL Coder to handle denormal numbers in your design:
nfpconfig.LibrarySettings.HandleDenormals = 'on'; nfpconfig.LibrarySettings.LatencyStrategy = 'MAX';
To learn how you can verify the generated code, see Verify the Generated Code from Native Floating-Point.
Specify Native Floating Point for a MATLAB Function
You can specify the native floating-point settings for HDL code generation by using the MATLAB HDL Workflow Advisor or the command line.
To specify the native floating-point settings in the MATLAB HDL Workflow Advisor:
Open the MATLAB HDL Workflow Advisor. To get started with the MATLAB HDL Workflow Advisor, see Basic HDL Code Generation and FPGA Synthesis from MATLAB.
In the left pane, click the HDL Code Generation task. In the right pane, navigate to the Floating Point tab and set Library to
Native Floating Point
.Click the Clocks & Ports tab and set Oversampling factor to a value greater than one.
Set Latency Strategy to
MIN
,MAX
, orZERO
to map your design to minimum, maximum, or no latency, respectively. See Latency Strategy.If you have denormal numbers in your design, select Handle Denormals. Denormal numbers are numbers that have an exponent field equal to zero and a nonzero mantissa field. See Handle Denormals.
If your design has multipliers, specify how you want HDL Coder to implement the multiplication operation by using the Mantissa Multiplier Strategy parameter. See Mantissa Multiplier Strategy.
In the left pane, right-click on the HDL Code Generation task and select Run to Selected Task.
To apply native floating point at the command line for HDL code generation, use the
coder.config
function to create a coder.HdlConfig
object for HDL code generation and the
hdlcoder.createFloatingPointTargetConfig
function to create an
hdlcoder.FloatingPointTargetConfig
object for
the native floating-point
library.
hdlcfg = coder.config("hdl"); nfpconfig = hdlcoder.createFloatingPointTargetConfig('NATIVEFLOATINGPOINT'); hdlcfg.FloatingPointLibrary = 'NativeFloatingPoint'; hdlcfg.FloatingPointTargetConfiguration = nfpconfig;
Optionally, you can specify the latency strategy and whether you want HDL Coder to handle denormal numbers in your design.
nfpconfig.LibrarySettings.HandleDenormals = 'on'; nfpconfig.LibrarySettings.LatencyStrategy = 'MAX';
View Code Generation Report
To view the code generation reports of floating-point library mapping, before you begin code generation, enable generation of the Resource Utilization Report and Optimization Report. To enable the reports, on the HDL Code tab, click Settings > Report Optionsin the Configuration Parameters dialog box, on the HDL Code Generation pane, enable Generate resource utilization report and Generate optimization report. For more information, see Create and Use Code Generation Reports.
To see the list of native floating-point operators that HDL Coder supports and the floating-point operators to which your Simulink blocks mapped to, in the Code Generation Report, select Native Floating-Point Resource Report.
A detailed report shows the various resources that the floating-point blocks use on the target device that you specify. HDL code generation from a native floating point design uses dynamic shift operations for aligning mantissa based on exponent values. Because these dynamic shifters are resource-expensive in the model, they are reported separately from static shift operators. For more information on dynamic and static shifters, see Use Code Generation Reports to Evaluate Code Before Synthesis.
To see the native floating-point settings that you applied to the model and whether HDL Coder successfully generated HDL code, in the Code Generation Report, select Target Code Generation.
Analyze Results
Floating point operators have a latency. If your Simulink model does not have delays, when you generate HDL code, the code generator
figures out the operator latency and delay balances parallel paths. Consider this
Simulink model that has two single
inputs and gives a
single
output.
The MATLAB Function block in the Simulink model contains this code.
function y = fcn(u, w) %#codegen y1 = (u+w) * 20; y2 = w^16; y3 = (u-w) / 10; y = y1 + y2 - y3;
When you generate HDL code, the code generator maps the blocks in your Simulink model to synthesizable native floating-point operators. To see how the code generator implemented the floating-point operations, open the generated model. The blocks NFP math, NFP Sqrt, and NFP trig correspond to the floating-point implementation of the Reciprocal Sqrt, Reciprocal, sin, and cos blocks respectively in your original model.
Every floating-point operator has a latency. The code generator inserted an additional
matching delay because the latency of the Reciprocal Sqrt is
30
and latency of Reciprocal is 31
.
The operator latency is equal to the Delay length of the
Delay block inside that NFP
block. For example, if you
double-click the NFP sqrt
block, you can get the latency by looking at
the Delay length of the Delay
block. See Latency Values of Floating-Point Operators.
When you use MATLAB Function blocks with floating-point data types,
HDL Coder uses the MATLAB Datapath
architecture. This architecture
treats the MATLAB Function block like a regular Subsystem
block. When you generate code, the code generator maps the basic operations such as addition
and multiplication to the corresponding native floating-point operators. Open the
MATLAB Function
subsystem to see how the code generator implemented the
MATLAB Function block.
To learn more about the generated model, see Generated Model and Validation Model.
Limitation
To generate HDL code in native floating-point mode, use discrete sample times. Blocks operating at a continuous sample time are not supported.