streaming HDL friendly FFT works in Simulink, not in ModelSim

I am building an OFDM system with the usual (I)FFT-based transmitter and FFT-based receiver, using the HDL streaming FFT block. Although the Simulink version runs like a champ and returns the (delayed) same data that was sent, a ModelSim on the generated HDL code w/ a simple testbench does not. The IFFT output differs, and the FFT output differs radically, with a higher sample rate than the input.

Test model: Rect. QAM mod -> IFFT (Streaming FFT w/ Im/Re swap at input & output) -> FFT -> QAM demod. 512 pt. FFTs used in this test. Same problem w/ various TX data generators.

EDIT: I just tried back-to-back 16-point FFTs, adjusting the delay between the IFFT out and the FFT in accordingly, and ModelSim returns correct results, i.e., QAM demod out = delay(QAM mod in).

I shall try a couple of intermediate sizes, in the quest for the disparity I encountered at 512 points. (Arith. overflow in the Verilog, but not the Simulink C??? Other???)

[asher bin zafar]

hello. i am working on a simlar project with a qpsk modulated IFFT based trasmitter and receiver. i am unable to get a proper scope output nor any correct simout graphs. can anyone guide me in this regard how to build a hdl supoorted ofdm transmitter. thanks

[Kiran Kintali]

Thank you for your followup. HDL Coder generated code from the FFT block should match MATLAB/Simulink Simulation behavior. The block simulation behavior and/or generated HDL code needs to be further investigated. Please reach out to [e-mail] with the issue and reproduction steps based on your configuration.

Answer 1

[Bharath Venkataraman]

Have you tried generating the co-simulation model with HDL Coder? That co-simulation model takes the data from Simulink, runs it through the HDL Code and brings it back to Simulink. This will tell you if it is the HDL code or the testbench that is the problem.

Are you using the testbench produced by HDL Coder in ModelSim?

You can also try generating code for just one piece at a time (FFT, IFFT etc.) to see if you can narrow down the cause of failure.

[John Eldon]

OK, I solved it. The Simulink model and the HDL version thereof do not handle arithmetic overflows in the same manner. The solution (in retrospect, duh ...) was to divide the output of the IFFT by 2**(N/2) before feeding it to the FFT.

Mathworks might want to warn folks that the streaming HDL FFT and the Simulink model do not behave the same under all scenarios.

Answer 2

[Bharath Venkataraman]

Is it possible for you to contact technical support at MathWorks with this model? If you generate the HDL code and testbench from HDL Coder, and run it in an HDL simulator, it should fail if the Simulink model and HDL do not match.