Pipelining using HDL Coder

Dear all,

I have been describing HDL code using MATLAB, and then converting it to VHDL using the MATLAB HDL Coder app. This code does some signal processing, and uses the dsp.FFT library, as well as other custom functions.

The problem lies in the generated code, which has a very long path in it and doesn't let the design reach the required frequency. I have been advised to use the Pipelining options in HDL Coder, but sadly to no avail. There are 3 possible options (Register inputs, outputs and Distribute pipeline registers), but they don't seem to have much documentation (tooltip says Select to enable X, mathworks website focuses mainly on its Simulink counterpart).

I have tried using "Distribute pipeline registers", which should allow for MATLAB to optimize the working frequency of the code, but I have noticed no improvement after trying these options.

Is there a way to tackle this problem with the options shown above? Does Simulink provide a better Pipelining support? Can the code be converted to Simulink automatically?

Best regards,

Adrian.

Answer 1

[Kiran Kintali]

Can you share some sample code and the project file?

if the critical path is within optimized IP such as hdl.FFT distributed pipelining option currently would not move registers within this IP.

Please reach out to support team with your usecase.